deveopmen
UARTi Special Mode Register
Rev.B2 for proof reading
Mitsubishi Microcomputers
M32C/83 group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
187
UARTi Special Mode Register
UARTi (i=0 to 4) operate the IIC bus interface (simple IIC bus) using the UARTi special mode register
(addresses 0367
16
, 02E7
16
, 0337
16
, 0327
16
and 02F7
16
) and UARTi special mode register 2 (addresses
0366
16
, 02E6
16
, 0336
16
, 0326
16
and 02F6
16
). UARTi add special functions using UARTi special mode
resister 3 (addresses 0365
16
, 02E5
16
, 0355
16
, 0325
16
and 02F5
16
).
(1) IIC Bus Interface Mode
The I
2
C bus interface mode is provided with UARTi.
Table 1.21.1 shows the construction of the UARTi special mode register and UARTi special mode regis-
ter 2.
When the I
2
C mode select bit (bit 0 in addresses 0367
16
, 02E7
16
, 0337
16
, 0327
16
and 02F7
16
) is set to
“
1
”
, the I
2
C bus (simple I
2
C bus) interface circuit is enabled.
To use the I
2
C bus, set the SCLi and the SDAi of both master and slave to output with the function select
register. Also, set the data output select bit (bit 5 in address 036C
16
, 02EC
16
, 033C
16
, 032C
16
and
02FC
16
) to N-channel open drain output.
Table 1.21.1 shows the relationship of the IIC mode select bit to control. To use the chip in the clock
synchronized serial I/O mode or UART mode, always set this bit to
“
0
”
.
Function
Normal mode (IICM=0)
I
2
C mode (IICM=1)
Factor of interrupt number 17, 19, 33, 35, 37
UARTi transmission
No acknowledgment detection (NACK)
Factor of interrupt number 18, 20, 34, 36, 38
UARTi reception
Start condition detection or stop
condition detection
UARTi transmission output delay
Not delayed
Delayed
P6
3
, P6
7
, P7
0
, P9
2
, P9
6
at the time when UARTi
is in use
TxD
i
(output)
SDAi (input/output)
P6
2
, P6
6
, P7
1
, P9
1
, P9
7
at the time when UARTi
is in use
RxD
i
(input)
SCLi (input/output)
P6
1
, P6
5
, P7
2
, P9
0
, P9
5
at the time when UARTi
is in use
CLKi
P6
1
, P6
5
, P7
2
, P9
0
, P9
5
DMA factor at the time
UARTi reception
Acknowledgment detection (ACK)
Noise filter width
15ns
Reading the terminal when 0 is
assigned to the direction register
50ns
Reading the terminal regardless of the
value of the direction register
Reading P6
2
, P6
6
, P7
1
, P9
1
, P9
7
1
2
3
4
5
6
7
8
9
Note 1: Make the settings given below when I
2
C mode is used.
Set 0 1 0 in bits 2, 1, 0 of the UARTi transmission/reception mode register.
Disable the RTS/CTS function. Choose the MSB First function.
Note 2: Follow the steps given below to switch from one factor to another.
1. Disable the interrupt of the corresponding number.
2. Switch from a factor to another.
3. Reset the interrupt request flag of the corresponding number.
4. Set an interrupt level of the corresponding number.
Note 3: Set an initial value of SDA transmission output when IIC mode (IIC mode select bit = "1") is valid and serial I/O is invalid.
Factor of interrupt number 39 to 41
Bus collision detection
Acknowledgment detection (ACK)
10
Initial value of UARTi output
H level (when 0 is assigned to
the CLK polarity select bit)
The value set in latch P6
3
, P6
7
, P7
0
,
P9
2
, P9
6
when the port is selected
(Note 3)
11
(Note 2)
(Note 2)
(Note 2)
(Note 1)
(Note 3)
Table 1.21.1. Features in I
2
C mode