deveopmen
Power Saving
Rev.B2 for proof reading
Mitsubishi Microcomputers
M32C/83 group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
76
Power Saving
There are three power save modes. Figure 1.8.9 shows the clock transition between each of the three
modes, (1), (2), and (3).
Normal operating mode
CPU and peripheral function operate when supplying clock. Power dissipation is reduced by making
BCLK slow.
Wait mode
BCLK is stopped. Peripheral function clock is stopped as desired. Main clock and sub clock isn't
stopped. Power dissipation is reduced than normal operating mode.
Stop mode (Note 1)
Main clock, sub clock and PLL synthesizer are stopped. CPU and peripheral function clock are
stopped. Power dissipation is the most few in this mode.
Note :When using stop mode, oscillation stop detect function must be canceled.
(1) Normal operating mode
High-speed mode
Main clock one cycle forms CPU operating clock.
Medium-speed mode
The main clock divided into 2, 3, 4, 6, 8, 10, 12, 14, or 16 forms CPU operating clock.
Low-speed mode
Subclock (fc) forms CPU operating clock.
Low power-dissipation mode
This mode is selected when the main clock is stopped from low-speed mode. Only the peripheral
functions for which the subclock was selected as the count source continue to run.
Ring oscillator mode
The ring oscillator clock divided into 2, 3, 4, 6, 8, 10, 12, 14, or 16 forms CPU operating clock.
Ring oscillator low power-dissipation mode
This mode is selected when the main clock is stopped from low-speed mode.
When switching BCLK from ring oscillator to main clock, switch clock after main clock oscillates fully
stable. After setting divided by 8 (main clock division register =08
16
) in ring oscilltor mode, switching
to the middle mode (divided by 8) is recommended.
(2) Wait mode
In wait mode, BCLK is stopped and CPU and watchdog timer operated by BCLK are halted. The main
clock, subclock and ring oscillator clock continue to run.
(a) Shifting to wait mode
Execute WAIT instruction.
(b) Peripheral function clock stop function
The f
1
, f
8
and f
2n
being supplied to the internal peripheral functions stops. The internal peripheral
functions operated by the clock stop.