deveopmen
Rev.B2 for proof reading
Bus Control
Mitsubishi Microcomputers
M32C/83 group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
55
Processor mode
Memory space
expansion
mode
S
Memory expansion mode
Mode 0
Chip select signal
CS0
CS1
CS2
CS3
C00000
16
to
DFFFFF
16
(2 Mbytes)
Microprocessor mode
Memory expansion mode
008000
16
to
1FFFFF
16
(2016 Kbytes)
200000
16
to
3FFFFF
16
(2 Mbytes)
008000
16
to
3FFFFF
16
(4064 Kbytes)
Microprocessor mode
E00000
16
to
FFFFFF
16
(2 Mbytes)
C00000
16
to
EFFFFF
16
(3 Mbytes)
C00000
16
to
FFFFFF
16
(4 Mbytes)
E00000
16
to
EFFFFF
16
(1 Mbytes)
100000
16
to
1FFFFF
16
(1 Mbytes)
Mode 1
Mode 2
Mode 3
Memory expansion mode
Microprocessor mode
F00000
16
to
FFFFFF
16
(1 Mbytes)
200000
16
to
2FFFFF
16
(1 Mbytes)
C00000
16
to
CFFFFF
16
(1 Mbytes)
(A22)
(A21)
(A20)
(A23)
(A21)
(A20)
(A20)
Bus Control
The following explains the signals required for accessing external devices and software waits. The signals
required for accessing the external devices are valid when the processor mode is set to memory expan-
sion mode and microprocessor mode.
(1) Address bus/data bus
_____
There are 24 pins, A
0
to A
22
and A
23
for the address bus for accessing the 16 Mbytes address space.
A
23
is an inverted output of the MSB of the address.
The data bus consists of pins for data IO. The external data bus control register (address 000B
16
)
selects the 8-bit data bus, D
0
to D
7
for each external area, or the 16-bit data bus, D
0
to D
15
. After a reset,
there is by default an 8-bit data bus for the external area 3 when the BYTE pin is High, or a 16-bit data
bus when the BYTE pin is Low.
When shifting from single-chip mode to extended memory mode, the value on the address bus is unde-
fined until an external area is accessed.
When accessing a DRAM area with DRAM control in use, a multiplexed signal consisting of row address
and column address is output to A
8
to A
20
.
(2) Chip select signals
_____
The chip select signals share A
0
to A
22
and A
23
. You can use bits 0 and 1 of the processor mode register
1 (address 0005
16
) to set the external area mode, then select the chip select area and number of
address outputs.
In microprocessor mode, external area mode 0 is selected after a reset. The external area can be split
into a maximum of four Blocks or Areas using the chip select signals. Table 1.7.4 shows the external
areas specified by the chip select signals.
Table 1.7.4. External areas specified by the chip select signals