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8.4 Port 1
8.4.2
Operation of Port 1
This section describes the operation of port 1.
s Operation of Port 1
r Setting Port 1 as an output port in the Port 1 direction register (DDR1)
Setting Port 1 as an output port in the Port 1 direction register (DDR1)
The value stored in the Port 1 data register (PDR1) is output to the Port 1 pin. If the PDR1
register is read, the value stored in PDR1 register is output.
r Setting Port 1 as an input port in the Port 1 direction register (DDR1)
The Port 1 pin has high impedance. However, the Port 1 pin retains the "H" level if the bit in
the Port 1 pull-up resistor register (RDR1) is set to "1" and thus the pull-up resistor is
connected.
If the Port 1 data register (PDR1) is set to a value, the value stored in the PDR1 register is
retained but not output to the pin.
If the PDR1 register is read, the pin input level ("0" for "L" or "1" for "H") is output.
Note:
If a read-modify-write instruction (such as the bit set instruction) is used to access the PDR1
register, no bit specified for output in the DDR1 register is affected. For a bit specified for
input in the DDR1 register, however, the pin input level is written to the PDR1 register.
Therefore, to change a bit specified for input to output, first write an output value to the
PDR1 register and then specify the DDR1 register as an output port.
r Port operation after a reset
When the CPU is reset, the DDR1 and RDR1 registers are initialized to "00H" and the Port 1
pin has high impedance.
The PDR1 register is not initialized when the CPU is reset. To use the port in output mode,
therefore, output mode must be specified in the DDR1 register after the output data is set in
the PDR1 register.
r Port operation in stop or time-base timer mode
If the port switches to stop mode or timebase timer mode while the pin status setting bit (SPL) of
the low power consumption mode control register (LPMCR) is set to "1", the pins come to have
high impedance regardless of the value in the Port 1 direction register (DDR1). Note that the
input buffer is forcibly shut off to prevent leakage due to an open circuit.
Note:
If a pull-up resistor is connected, setting the pin status setting bit (SPL) of the low power
consumption mode control register (LPMCR) to "1" does not disconnect the pull-up resistor
but holds the pin level at "H".