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CHAPTER 20 1M-BIT (128KB) FLASH MEMORY
20.5.1 Data Polling Flag (DQ7)
The data polling flag (DQ7) uses the data polling function to post that the automatic
algorithm is being executed or has terminated.
s Data Polling Flag (DQ7)
Table 20.5-3 "Data Polling Flag State Transitions (state change for normal operation)" and
Table 20.5-4 "Data Polling Flag State Transitions (state change for abnormal operation)" list the
state transitions of the data polling flag.
r Write
Read-access during execution of the automatic write algorithm causes the flash memory to
output the opposite data of bit 7 last written, regardless of the value at the address specified by
the address signal. Read-access at the end of the automatic write algorithm causes the flash
memory to output bit 7 of the read value of the address specified by the address signal.
r Chip/sector erase
For a sector erase, read-access during execution of the chip erase/sector erase algorithm
causes the flash memory to output 0 from the sector currently being erased. For a chip erase,
read-access causes the flash memory to output 0 regardless of the value at the address
specified by the address signal.
Read-access at the end of the automatic write algorithm
causes the flash memory to output 1 in the same way.
Table 20.5-3 Data Polling Flag State Transitions (state change for normal operation)
Operating
state
Write -->
Completed
Chip/sector
erase -->
Completed
Sector erase
wait -->
Started
Sector erase
--> Erase
suspend
(sector being
erased)
Sector erase
suspend -->
Restarted
(sector being
erased)
Sector erase
suspended
(sector not
being erased)
DQ7
DQ7 -->
DATA:7
0 --> 1
0
0 --> 1
1 --> 0
DATA:7
Table 20.5-4 Data Polling Flag State Transitions (state change for abnormal operation)
Operating state
Write
Chip/sector erase
DQ7
0