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CHAPTER 6 INTERRUPTS
6.2
Interrupt Causes and Interrupt Vectors
TThe MB90560 and 565 series have functions for handling 256 types of interrupt
cause. The 256 interrupt vector tables are allocated to the memory at the highest
addresses.
Software interrupts can use 256 interrupt instructions (INT0 to INT255). Note that INT8
is shared with a reset vector interrupt and that INT10 is shared with exception
processing. INT11 to INT 42 are shared with an interrupt from a peripheral function
(resource).
s Interrupt Vectors
Interrupt vector tables referenced during interrupt processing are allocated to the highest
addresses in the memory area (FFFC00H to FFFFFFH). Interrupt vectors share the same area
with EI2OS, exception processing, hardware, and software interrupts.
Table 6.2-1 "Interrupt Vectors" shows the assignment of software interrupt instructions, interrupt
numbers, and interrupt vectors.
Reference:
Interrupt vectors not defined during software design should be set at the exception
processing address.
Table 6.2-1 Interrupt Vectors
Software
interrupt
instruction
Vector
address L
Vector
address M
Vector
address H
Mode data
Interrupt
No.
Hardware interrupt
INT0
FFFFFCH
FFFFFDH
FFFFFEH
Not used
#0
None
::
:
INT7
FFFFE0H
FFFFE1H
FFFFE2H
Not used
#7
None
INT8
FFFFDCH
FFFFDDH
FFFFDEH
FFFFDFH
#8
(RESET Vector)
INT9
FFFFD8H
FFFFD9H
FFFFDAH
Not used
#9
None
INT10
FFFFD4H
FFFFD5H
FFFFD6H
Not used
#10
<Exception processing>
INT11
FFFFD0H
FFFFD1H
FFFFD2H
Not used
#11
Hardware interrupt #0
INT12
FFFFCCH
FFFFCDH
FFFFCEH
Not used
#12
Hardware interrupt #1
INT13
FFFFC8H
FFFFC9H
FFFFCAH
Not used
#13
Hardware interrupt #2
INT14
FFFFC4H
FFFFC5H
FFFFC6H
Not used
#14
Hardware interrupt #3
::
:
INT254
FFFC04H
FFFC05H
FFFC06H
Not used
#254
None
INT255
FFFC00H
FFFC01H
FFFC02H
Not used
#255
None