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CHAPTER 2 CPU
2.9.5
Notes on Using the "DIV A, Ri" or "DIVW A, RWi"
Instruction
To use the "DIV A, Ri" or "DIVW A, RWi" instruction, set the bank register to "00H".
s Notes on Using the "DIV A, Ri" or "DIVW A, RWi" Instruction
If the bank register (DTB, ADB, USB, SSB) value is "00H", the remainder obtained through
division is stored in the instruction operand register.
Otherwise, the upper-8-bit address is
specified in the bank register corresponding to the instruction operand register, and the lower-
16-bit address is the same as the address in the instruction operand register. The remainder is
stored in the bank register specified by the upper 8 bits.
Table 2.9-7 Notes on Using the "DIV A, Ri" or "DIVW A, RWi" Instruction (i = 0 to 7)
Instruction
Bank register name to be
affected by executing the
instruction described on the
left
Address in which the remainder is stored
DIV A,R0
DTB
(DTB:8 upper bits)+(0180H+RPx10H+8H:16 lower bits)
DIV A,R1
(DTB:8 upper bits)+(0180H+RPx10H+9H:16 lower bits)
DIV A,R4
(DTB:8 upper bits)+(0180H+RPx10H+CH:16 lower bits)
DIV A,R5
(DTB:8 upper bits)+(0180H+RPx10H+DH:16 lower bits)
DIVW A,RW0
(DTB:8 upper bits)+(0180H+RPx10H+0H:16 lower bits)
DIVW A,RW1
(DTB:8 upper bits)+(0180H+RPx10H+2H:16 lower bits)
DIVW A,RW4
(DTB:8 upper bits)+(0180H+RPx10H+8H:16 lower bits)
DIVW A,RW5
(DTB:8 upper bits)+(0180H+RPx10H+AH:16 lower bits)
DIV A,R2
ADB
(ADB:8 upper bits)+(0180H+RPx10H+AH:16 lower bits)
DIV A,R6
(ADB:8 upper bits)+(0180H+RPx10H+EH:16 lower bits)
DIVW A,RW2
(ADB:8 upper bits)+(0180H+RPx10H+4H:16 lower bits)
DIVW A,RW6
(ADB:8 upper bits)+(0180H+RPx10H+EH:16 lower bits)
DIV A,R3
USB
SSB (*1)
(USB (*2) 8 upper bits)+(0180H+RPx10H+BH:16 lower bits)
DIV A,R7
(USB (*2) 8 upper bits)+(0180H+RPx10H+FHF6 lower bits)
DIVW A,RW3
(USB (*2) 8 upper bits)+(0180H+RPx10H+6H:16 lower bits)
DIVW A,RW7
(USB (*2) 8 upper bits)+(0180H+RPx10H+EH:16 lower bits)
*1 : Depending on the S bit in the CCR register
*2 : When the S bit in the CCR register is 0.