參數(shù)資料
型號： MC68HC08KH12A
廠商： 飛思卡爾半導體(中國)有限公司
英文描述： Microcontrollers
中文描述： 微控制器
文件頁數(shù)： 133/178頁
文件大小： 925K
代理商： MC68HC08KH12A
Port E
MC68HC08KH12A Data Sheet, Rev. 1.1
Freescale Semiconductor
133
12.6 Port E
Port E is a 5-bit special function port that shares four of its pins with the keyboard interrupt module (KBI)
and shares three of its pins with the timer interface module (TIM). PTE3–PTE0 pins have built-in schmitt
triggered input and software configurable pull-up; In addition, PTE3–PTE0 pins have built-in optical
interface circuit which can be enabled via the Port-E Optical Interface Enable Register.
12.6.1 Port E Data Register (PTE)
The port E data register contains a data latch for each of the five port E pins.
PTE[4:0] — Port E Data Bits
PTE[4:0] are read/write, software-programmable bits. Data direction of each port E pin is under the
control of the corresponding bit in data direction register E.
TCH1-TCH0 — Timer Channel I/O Bits
The PTE2/TCH1-PTE1/TCH0 pins are the TIM input capture/output compare pins. The edge/level
select bits, ELSxB and ELSxA, determine whether the PTE2/TCH1–PTE1/TCH0 pins are timer
channel I/O pins or general-purpose I/O pins. See
Chapter 11 Timer Interface Module (TIM)
.
NOTE
Data direction register E (DDRE) does not affect the data direction of port
E pins that are being used by the TIM. However, the DDRE bits always
determine whether reading port E returns the states of the latches or the
states of the pins.
TCLK — Timer Clock Input
The PTE0/TCLK pin is the external clock input for the TIM. The prescaler select bits, PS2-PS0, selects
PE0/TCLK as the TIM clock input. When not selected as the TIM clock, PE0/TCLK is available for
general purpose I/O. See
Chapter 11 Timer Interface Module (TIM)
.
The PEPE[3:0] bits in the port E keyboard interrupt enable register enable individual pull-ups on port E
pins PTE3–PTE0 if the respective pin is configured as an input. (See
15.4.3.2 Port-E Keyboard Interrupt
Enable Register
.)
The port-E keyboard interrupt enable bits, KBEIE3—KBEIE0, in the port-E keyboard interrupt enable
register (KBEIER), enable the port E pins as external interrupt pins. See
Chapter 15 Keyboard Interrupt
Module (KBI)
.
Address:
$0008
Bit 7
6
5
4
3
2
1
Bit 0
Read:
0
0
0
PTE4
PTE3
PTE2
PTE1
PTE0
Write:
Reset:
Unaffected by reset
Alternate Function:
KBE3
KBE2
KBE1
KBE0
Alternate Function:
TCH1
TCH0
TCLK
= Unimplemented
Figure 12-13. Port E Data Register (PTE)
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