參數(shù)資料
型號： MC68HC08KH12A
廠商： 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述： Microcontrollers
中文描述： 微控制器
文件頁數(shù)： 26/178頁
文件大?。?/td> 925K
代理商： MC68HC08KH12A
Memory Map
MC68HC08KH12A Data Sheet, Rev. 1.1
26
Freescale Semiconductor
$0013
TIM Counter Register Low
(TCNTL)
R:
Bit 7
6
5
4
3
2
1
Bit 0
W:
$0014
TIM Counter Modulo Register High
(TMODH)
R:
Bit 15
14
13
12
11
10
9
Bit 8
W:
$0015
TIM Counter Modulo Register Low
(TMODL)
R:
Bit 7
6
5
4
3
2
1
Bit 0
W:
$0016
TIM Channel 0 Status and Control
Register (TSC0)
R:
CH0F
CH0IE
MS0B
MS0A
ELS0B
ELS0A
TOV0
CH0MAX
W:
0
$0017
TIM Channel 0 Register High (TCH0H)
R:
Bit 15
14
13
12
11
10
9
Bit 8
W:
$0018
TIM Channel 0 Register Low (TCH0L)
R:
Bit 7
6
5
4
3
2
1
Bit 0
W:
$0019
TIM Channel 1 Status and Control
Register (TSC1)
R:
CH1F
CH1IE
0
MS1A
ELS1B
ELS1A
TOV1
CH1MAX
W:
0
$001A
TIM Channel 1 Register High (TCH1H) R:
Bit 15
14
13
12
11
10
9
Bit 8
$001B
TIM Channel 1 Register Low (TCH1L)
R:
Bit 7
6
5
4
3
2
1
Bit 0
W:
$001C
PORT E Optical Interface Enable
Register (EOIER)
R:
YREF2
YREF1
YREF0
XREF2
XREF1
XREF0
OIEY
OIEX
W:
$001D
Port Option Control Register (POC)
R:
0
0
LDD
0
0
PCP
PBP
PAP
W:
$001E IRQ Status and Control Register (ISCR)
R:
0
0
0
0
IRQF1
0
IMASK1
MODE1
W
ACK1
$001F
Configuration Register
(CONFIG)
R:
0
0
0
0
SSREC
COPRS
STOP
COPD
W:
One-time writable register
$0020
USB Embedded Device Endpoint 0
Data Register 0 (DE0D0)
R: DE0R07
DE0R06
DE0R05
DE0R04
DE0R03
DE0R02
DE0R01
DE0R00
W:
DE0T07
DE0T06
DE0T05
DE0T04
DE0T03
DE0T02
DE0T01
DE0T00
$0021
USB Embedded Device Endpoint 0
Data Register 1 (DE0D1)
R: DE0R17
DE0R16
DE0R15
DE0R14
DE0R13
DE0R12
DE0R11
DE0R10
W:
DE0T17
DE0T16
DE0T15
DE0T14
DE0T13
DE0T12
DE0T11
DE0T10
$0022
USB Embedded Device Endpoint 0
Data Register 2 (DE0D2)
R: DE0R27
DE0R26
DE0R25
DE0R24
DE0R23
DE0R22
DE0R21
DE0R20
W:
DE0T27
DE0T26
DE0T25
DE0T24
DE0T23
DE0T22
DE0T21
DE0T20
$0023
USB Embedded Device Endpoint 0
Data Register 3 (DE0D3)
R: DE0R37
DE0R36
DE0R35
DE0R34
DE0R33
DE0R32
DE0R31
DE0R30
W:
DE0T37
DE0T36
DE0T35
DE0T34
DE0T33
DE0T32
DE0T31
DE0T30
$0024
USB Embedded Device Endpoint 0
Data Register 4 (DE0D4)
R: DE0R47
DE0R46
DE0R45
DE0R44
DE0R43
DE0R42
DE0R41
DE0R40
W:
DE0T47
DE0T46
DE0T45
DE0T44
DE0T43
DE0T42
DE0T41
DE0T40
$0025
USB Embedded Device Endpoint 0
Data Register 5 (DE0D5)
R: DE0R57
DE0R56
DE0R55
DE0R54
DE0R53
DE0R52
DE0R51
DE0R50
W:
DE0T57
DE0T56
DE0T55
DE0T54
DE0T53
DE0T52
DE0T51
DE0T50
Addr.
Name
Bit 7
6
5
4
3
2
1
Bit 0
= Unimplemented
R
= Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 2 of 6)
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