I/O Register Description of the Embedded Device Function
MC68HC08KH12A Data Sheet, Rev. 1.1
Freescale Semiconductor
99
9.5.6 USB Embedded Device Status Register (DSR)
DRSEQ — Embedded Device Endpoint 0 Receive Sequence Bit
This read only bit indicates the type of data packet last received for embedded device Endpoint 0
(DATA0 or DATA1).
1 = DATA1 Token received in last embedded device Endpoint 0 receive
0 = DATA0 Token received in last embedded device Endpoint 0 receive
DSETUP — Embedded Device SETUP Token Detect Bit
This read only bit indicates that a valid SETUP token has been received.
1 = Last token received for Endpoint 0 was a SETUP token
0 = Last token received for Endpoint 0 was not a SETUP token
DTX1ST — Embedded Device Transmit First Flag
This read only bit is set if the embedded device Endpoint 0 Data Transmit Flag (TXD0F) is set when
the USB control logic is setting the embedded device Endpoint 0 Data Receive Flag (RXD0F). In other
words, if an unserviced Endpoint 0 Transmit Flag is still set at the end of an endpoint 0 reception, then
this bit will be set. This bit lets the firmware know that the Endpoint 0 transmission happened before
the Endpoint 0 reception. Reset clears this bit.
1 = IN transaction occurred before SETUP/OUT
0 = IN transaction occurred after SETUP/OUT
DTX1STR — Clear Transmit First Flag
Writing a logic 1 to this write only bit will clear the DTX1ST bit if it is set. Writing a logic 0 to the
DTX1STR has no effect. Reset clears this bit.
RP0SIZ3-RP0SIZ0 — Embedded Device Endpoint 0 Receive Data Packet Size
These read only bits store the number of data bytes received for the last OUT or SETUP transaction
for embedded device Endpoint 0. These bits are not affected by reset.
Address: $004D
Bit 7
6
5
4
3
2
1
Bit 0
Read:
DRSEQ
DSETUP
DTX1ST
0
RP0SIZ3
RPS0IZ2
RP0SIZ1
RP0SIZ0
Write:
DTX1STR
Reset:
X
X
0
0
X
X
X
X
= Unimplemented
X = Indeterminate
Figure 9-21. USB Embedded Device Status Register (DSR)