參數(shù)資料
型號： MC68HC08KH12A
廠商： 飛思卡爾半導體(中國)有限公司
英文描述： Microcontrollers
中文描述： 微控制器
文件頁數(shù)： 85/178頁
文件大?。?/td> 925K
代理商： MC68HC08KH12A
I/O Register Description of the HUB function
MC68HC08KH12A Data Sheet, Rev. 1.1
Freescale Semiconductor
85
LOWSP1-LOWSP4 — Full Speed / Low Speed Port Control Bit
This read/write bit specifies the attached device in the downstream port is low speed device or full
speed device. Software is responsible to detect the device attachment and whether a device is full or
low speed. Reset clears this bit.
1 = Downstream port is low speed
0 = Downstream port is full speed
NOTE
after a port is enabled, HUB will automatically generate a low speed keep
awake signal to the port every millisecond.
RST1-RST4 — Force Reset to the Downstream Port
This read/write bit forces a reset signal (SE0 state) onto the USB downstream port data lines. This bit
can be set by the host request SetPortFeature (PORT_RESET) only. Software should control the
timing of the forced reset signaling downstream for at least 10 ms. Reset clears this bit.
1 = Force downstream port data lines to SE0 state
0 = Default
RESUM1-RESUM4 — Force Resume to the Downstream Port
This read/write bit forces a resume signal (“K” state) onto the USB downstream port data lines. This
bit is set to reflect the resume signal when the software detects the remote resume signal on the data
lines of the selective suspend downstream port. Downstream selective resume sequence to a port may
also be initiated via the host request ClearPortFeature (PORT_SUSPEND). Software should control
the timing of the forced resume signaling downstream for at least 20 ms. To indicate the end of the
resume, a low speed EOP signal will be followed when this control bit changes from 1 to 0. Reset clears
this bit.
1 = Force downstream port data lines to “K” state
0 = Default
SUSP1-SUSP4 — Downstream Port Selective Suspend Bit
This read/write bit forces the downstream port entering the selective suspend mode. This bit can be
set by the host request SetPortFeature (PORT_SUSPEND) only. When this bit is set, the hub prevents
propagating any bus activity (except the port reset or port resume request or the global reset signal)
downstream, and the port can only reflect upstream bus state changes via the endpoint 1 of the hub.
The blocking occurs at the next EOF2 point when this bit is set. Reset clears this bit.
1 = Force downstream port enters the selective suspend mode
0 = Default
D1+/D1– to D4+/D4– — Downstream Port Differential Data
These read only bits are the differential data shown on the HUB downstream ports. When the bit
SUSPND in the register HRPCR is 0, the data is the latched state at the last EOF2 sample point. When
the bit SUSPND is 1, the data reflects the current state on the data line while accessing this register.
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