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參數(shù)資料
| 型號： | MC68HC08KH12A |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | Microcontrollers |
| 中文描述： | 微控制器 |
| 文件頁數(shù)： | 86/178頁 |
| 文件大?。?/td> | 925K |
| 代理商： | MC68HC08KH12A |
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Universal Serial Bus Module (USB)
MC68HC08KH12A Data Sheet, Rev. 1.1
86
Freescale Semiconductor
9.4.3 USB SIE Timing Interrupt Register (SIETIR)
SOFF — Start Of Frame Detect Flag
This read only bit is set when a valid SOF PID is detected on the D0+ and D0– lines at the root port.
Software must clear this flag by writing a logic 1 to SOFFR bit in the SIETSR register. Reset clears this
bit. Writing to SOFF has no effect.
1 = Start Of Frame PID has been detected
0 = Start Of Frame PID has not been detected
EOF2F — The second End Of Frame Point Flag
This read only bit is set when the internal frame timer counts to the bit time that the hub must see
upstream traffic terminated near the end of frame. This bit time is defined as 10 bit times from the next
Start of Frame PID. Software must clear this flag by writing a logic 1 to EOF2FR bit in the SIETSR
register. Reset clears this bit. Writing to EOF2F has no effect.
1 = Frame timer counts to the EOF2 point
0 = Frame timer does not count to the EOF2 point
EOPF — End of Packet Detect Flag
This read only bit is set when a valid End-of-Packet sequence is detected on the D0+ and D0– lines.
Software must clear this flag by writing a logic 1 to the EOPFR bit in the SIETSR register. Reset clears
this bit. Writing to EOPF has no effect.
1 = End-of-Packet sequence has been detected
0 = End-of-Packet sequence has not been detected
TRANF — Bus Signal Transition Detect Flag
This read only bit is set if there is any bus activity on the upstream or the downstream data lines.
Generally speaking, this bit is used to wakeup the suspended hub when there is any bus activity
occurred. Software must clear this flag by writing a logic 1 to the TRANFR bit in the SIETSR register.
Reset clears this bit. Writing to TRANF has no effect.
1 = Signal transition has been detected
0 = Signal transition has not been detected
SOFIE — Start Of Frame Interrupt Enable
This read/write bit enables the Start Of Frame to generate a USB interrupt when the SOFF bit becomes
set. Reset clears this bit.
1 = USB interrupt enabled for Start Of Frame
0 = USB interrupt disabled for Start Of Frame
EOF2IE — The Second End of Frame Point Interrupt Enable
This read/write bit enables the Second End Of Frame to generate a USB interrupt when the EOF2F bit
becomes set. Reset clears this bit.
1 = USB interrupt enabled for the Second End Of Frame Point
0 = USB interrupt disabled for the Second End Of Frame Point
Address: $0056
Bit 7
6
5
4
3
2
1
Bit 0
Read:
SOFF
EOF2F
EOPF
TRANF
SOFIE
EOF2IE
EOPIE
TRANIE
Write:
Reset:
0
0
0
0
0
0
0
0
= Unimplemented
Figure 9-6. USB SIE Timing Interrupt Register (SIETIR)
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