Universal Serial Bus Module (USB)
MC68HC08KH12A Data Sheet, Rev. 1.1
88
Freescale Semiconductor
EOPFR — End of Packet Flag Reset
Writing a logic 1 to this write only bit will clear the EOPF bit if it is set. Writing a logic 0 to the EOPFR
has no effect. Reset clears this bit.
TRANFR — Bus Signal Transition Flag Reset
Writing a logic 1 to this write only bit will clear the TRANF bit if it is set. Writing a logic 0 to the TRANFR
has no effect. Reset clears this bit.
9.4.5 USB HUB Address Register (HADDR)
USBEN — USB Module Enable
This read/write bit enables and disables the USB module. When USBEN is cleared, the USB module
will not respond to any tokens and the external regulated output REGOUT will be turned off.
NOTE
**USBEN bit can only be cleared by a POR reset.
1 = USB function enabled
0 = USB function disabled, USB transceiver is also disabled to save power.
ADD6-ADD0 — USB HUB Function Address
These bits specify the address of the HUB function. Reset clears these bits.
9.4.6 USB HUB Interrupt Register 0 (HIR0)
TXDF — HUB Endpoint 0 Data Transmit Flag
This read only bit is set after the data stored in HUB Endpoint 0 transmit buffers has been sent and an
ACK handshake packet from the host is received. Once the next set of data is ready in the transmit
buffers, software must clear this flag by writing a logic 1 to the TXDFR bit. To enable the next data
packet transmission, TXE must also be set. If TXDF bit is not cleared, a NAK handshake will be
returned in the next IN transaction.
Address: $0058
Bit 7
6
5
4
3
2
1
Bit 0
Read:
USBEN
ADD6
ADD5
ADD4
ADD3
ADD2
ADD1
ADD0
Write:
Reset:
0**
0
0
0
0
0
0
0
0** = Reset by POR only
Figure 9-8. USB HUB Address Register (HADDR)
Address: $0059
Bit 7
6
5
4
3
2
1
Bit 0
Read:
TXDF
RXDF
0
0
TXDIE
RXDIE
0
0
Write:
TXDFR
RXDFR
Reset:
0
0
0
0
0
0
0
0
= Unimplemented
Figure 9-9. USB HUB Interrupt Register 0 (HIR0)