參數(shù)資料
型號： MC68HC08KH12A
廠商： 飛思卡爾半導體(中國)有限公司
英文描述： Microcontrollers
中文描述： 微控制器
文件頁數(shù)： 89/178頁
文件大?。?/td> 925K
代理商： MC68HC08KH12A
I/O Register Description of the HUB function
MC68HC08KH12A Data Sheet, Rev. 1.1
Freescale Semiconductor
89
Reset clears this bit. Writing to TXDF has no effect.
1 = Transmit on HUB Endpoint 0 has occurred
0 = Transmit on HUB Endpoint 0 has not occurred
RXDF — HUB Endpoint 0 Data Receive Flag
This read only bit is set after the USB HUB function has received a data packet and responded with
an ACK handshake packet. Software must clear this flag by writing a logic 1 to the RXDFR bit after all
of the received data has been read. Software must also set RXE bit to one to enable the next data
packet reception. If RXDF bit is not cleared, a NAK handshake will be returned in the next OUT
transaction.
Reset clears this bit. Writing to RXDF has no effect.
1 = Receive on HUB Endpoint 0 has occurred
0 = Receive on HUB Endpoint 0 has not occurred
TXDIE — HUB Endpoint 0 Transmit Interrupt Enable
This read/write bit enables the Transmit HUB Endpoint 0 to generate CPU interrupt requests when the
TXDF bit becomes set. Reset clears the TXDIE bit.
1 = USB interrupt enabled for Transmit HUB Endpoint 0
0 = USB interrupt disabled for Transmit HUB Endpoint 0
RXDIE — HUB Endpoint 0 Receive Interrupt Enable
This read/write bit enables the Receive HUB Endpoint 0 to generate CPU interrupt requests when the
RXDF bit becomes set. Reset clears the RXDIE bit.
1 = USB interrupt enabled for Receive HUB Endpoint 0
0 = USB interrupt disabled for Receive HUB Endpoint 0
TXDFR — HUB Endpoint 0 Transmit Flag Reset
Writing a logic 1 to this write only bit will clear the TXDF bit if it is set. Writing a logic 0 to TXDFR has
no effect. Reset clears this bit.
RXDFR — HUB Endpoint 0 Receive Flag Reset
Writing a logic 1 to this write only bit will clear the RXDF bit if it is set. Writing a logic 0 to RXDFR has
no effect. Reset clears this bit.
9.4.7 USB HUB Control Register 0 (HCR0)
TSEQ — HUB Endpoint 0 Transmit Sequence Bit
This read/write bit determines which type of data packet (DATA0 or DATA1) will be sent during the next
IN transaction directed at Endpoint 0. Toggling of this bit must be controlled by software. Reset clears
this bit.
1 = DATA1 Token active for next HUB Endpoint 0 transmit
0 = DATA0 Token active for next HUB Endpoint 0 transmit
Address: $005B
Bit 7
6
5
4
3
2
1
Bit 0
Read:
TSEQ
STALL0
TXE
RXE
TPSIZ3
TPSIZ2
TPSIZ1
TPSIZ0
Write:
Reset:
0
0
0
0
0
0
0
0
Figure 9-10. USB HUB Control Register 0 (HCR0)
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