參數(shù)資料
型號(hào)： MFRC50001T
廠商： NXP Semiconductors N.V.
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Highly integrated ISO-IEC 14443 A reader IC
封裝： MFRC50001T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1<week 15, 2005,;
文件頁(yè)數(shù)： 48/110頁(yè)
文件大小： 841K
代理商： MFRC50001T
MFRC500_33
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
PUBLIC
Rev. 3.3 — 15 March 2010
048033
48 of 110
NXP Semiconductors
MFRC500
Highly Integrated ISO/IEC 14443 A Reader IC
[1]
PrimaryStatus register Bit HiAlertIRq stores this event and it can only be reset using bit SetIRq.
10.5.2
Page 1: Control and status
10.5.2.1
Page register
Selects the page register; see
Section 10.5.1.1 “Page register” on page 43
.
10.5.2.2
Control register
Various control flags, for timer, power saving, etc.
Table 49.
Bit
Symbol
Access
Table 50.
Bit
7 to 6
5
[1]
This bit can only be set to logic 1 by successful execution of the Authent2 command
[2]
Reading this bit always returns logic 0
2
IdleIRq
1
command terminates correctly. For example; when the Command
register changes its value from any command to the Idle command.
If an unknown command is started the IdleIRq bit is set.
Microprocessor start-up of the Idle command does not set the
IdleIRq bit.
IdleIRq = logic 0 in all other instances
PrimaryStatus register HiAlert bit is set
[1]
PrimaryStatus register HiAlert bit is not set
PrimaryStatus register LoAlert bit is set
[1]
PrimaryStatus register LoAlert bit is not set
0
1
0
1
0
1
HiAlertIRq
0
LoAlertIRq
Table 48.
Bit Symbol
InterruptRq register bit descriptions
…continued
Value
Description
Control register (address: 09h) reset value: 0000 0000b, 00h bit allocation
7
6
5
4
00
StandBy
PowerDown
Crypto1On
R/W
D
D
3
2
1
0
TStopNow
W
TStartNow
W
FlushFIFO
W
D
Control register bit descriptions
Symbol
Value
00
-
StandBy
1
Description
reserved
activates Standby mode. The current consuming blocks are
switched off but the clock keeps running
activates Power-down mode. The current consuming blocks
are switched off including the clock
Crypto1 unit is switched on and all data communication with
the card is encrypted
[1]
Crypto1 unit is switched off. All data communication with the
card is unencrypted (plain)
immediately stops the timer
[2]
immediately starts the timer
[2]
immediately clears the internal FIFO buffer’s read and write
pointer, the FIFOLength[6:0] bits are set to logic 0 and the
FIFOOvfl flag
[2]
4
PowerDown
1
3
Crypto1On
1
0
2
1
0
TStopNow
TStartNow
FlushFIFO
1
1
1
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