參數(shù)資料
型號: MFRC50001T
廠商: NXP Semiconductors N.V.
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Highly integrated ISO-IEC 14443 A reader IC
封裝: MFRC50001T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1<week 15, 2005,;
文件頁數(shù): 90/110頁
文件大?。?/td> 841K
代理商: MFRC50001T
MFRC500_33
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
PUBLIC
Rev. 3.3 — 15 March 2010
048033
90 of 110
NXP Semiconductors
MFRC500
Highly Integrated ISO/IEC 14443 A Reader IC
13.4.4
Clock frequency
The clock input is pin OSCIN.
Table 158. Clock frequency
Symbol
Parameter
f
clk
clock frequency
The clock applied to the MFRC500 acts as a time constant for the synchronous system’s
encoder and decoder. The stability of the clock frequency is an important factor for
ensuring proper performance. To obtain highest performance, clock jitter must be as small
as possible. This is best achieved using the internal oscillator buffer and the
recommended circuitry; see
Section 9.8 on page 26
.
14. EEPROM characteristics
The EEPROM size is 32
×
16
×
8 = 4096 bit.
Table 159. EEPROM characteristics
Symbol
Parameter
N
endu(W_ER)
write or erase endurance
t
ret
retention time
t
er
erase time
t
a(W)
write access time
Conditions
checked by the clock
filter
Min
-
Typ
13.56
Max
-
Unit
MHz
δ
clk
t
jit
clock duty cycle
jitter time
40
-
50
-
60
10
%
ps
of clock edges
Conditions
erase/write cycles
T
amb
55
°
C
Min
100.000
10
-
-
Typ
-
-
-
-
Max
-
-
2.9
2.9
Unit
Hz
year
ms
ms
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