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參數(shù)資料
| 型號： | TSB12LV32-EP |
| 英文描述： | IC APEX 20KE FPGA 100K 324-FBGA |
| 中文描述： | 軍事增強塑料電機及電子學工程師聯(lián)合會1394-1995和P1394a兼容通用鏈路層控制器 |
| 文件頁數(shù)： | 44/106頁 |
| 文件大?。?/td> | 605K |
| 代理商： | TSB12LV32-EP |
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3
–
7
3.3.2
Byte and word fixed-timing reads shown in Figure 3
–
7 and Figure 3
–
8. Fixed-timing mode supports burst
transfers. If MCS is asserted low for more than one BCLK cycle, burst mode is enabled. The fixed-timing
burst mode does not have a limit on the maximum burst size allowed.
Microcontroller Fixed-Timing Mode
The timing sequence in the fixed-timing a read transaction can be summarized as follows:
1.
The host pulses MCS low to signal the start of access. Pulsing MCS low for more than once clock
cycle will enable burst mode. The number of BCLK cycles during which MCS is asserted low
determines the burst size.
2.
When the rising edge of BCLK samples MCS low and MWR high, the register value or GRF data
pointed to by MA is latched onto the MD lines. The MD lines will latch on every rising edge of BCLK
if MCS is asserted low.
3.
After 2 BCLK cycles, the TSB12LV32 pulses MCA low for one clock cycle to signal the completion
of the requested operation. If MCS is pulsed low for
n
BCLK cycles, MCA will also be pulsed low
for
n
cycles. Note that MA needs only contain valid data during the first cycle in which MCS is low.
Except for the first one, every data transfer takes only one BCLK cycle. If a read transaction is
accessing the CFR, it may not cross any register boundary.
Another read or write transaction can begin after the next rising edge of BCLK. Note that data size is
determined by the MCMODE/SIZ1 and M8BIT/SIZ0 signals. The ColdFire signal is only asserted high when
the micro interface is operating in ColdFire mode.
BCLK
COLDFIRE
M8BIT/SIZ0
MCMODE/SIZ1
MWR
MCS
MCA
MA[0:6]
MD[0:7]
MD[8:15]
A1
A2
D1
D2
D3
D4
D5
Figure 3
–
7. Byte Fixed-Timing Read
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TSB12LV32I | 制造商:TI 制造商全稱:Texas Instruments 功能描述:IEEE 1394-1995 and P1394a Compliant General-Purpose Link-Layer Controller |
| TSB12LV32IPZ | 功能描述:1394 接口集成電路 General-Purpose Link Layer Cntrlr RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB12LV32IPZEP | 制造商:Texas Instruments 功能描述:1394 I-TEMP 1394 GENERAL-PURPOSE LINK LAYER CONTROLLER (GP2L - Rail/Tube |
| TSB12LV32IPZG4 | 功能描述:1394 接口集成電路 General Purpose Link Layer Cntrlr RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB12LV32PZ | 功能描述:1394 接口集成電路 General-Purpose Link Layer Cntrlr RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
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