參數(shù)資料
型號(hào): TSB12LV32-EP
英文描述: IC APEX 20KE FPGA 100K 324-FBGA
中文描述: 軍事增強(qiáng)塑料電機(jī)及電子學(xué)工程師聯(lián)合會(huì)1394-1995和P1394a兼容通用鏈路層控制器
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代理商: TSB12LV32-EP
5
2
Isochronous DM Idle
(DMDONE is high)
DMEN is 1, DMASYNC is 0
DMREADY is High
Isochronous DM Go
(DMDONE is low)
New Isochronous Cycle Started
Isochronous Arbitrate/Xmit
(DMDONE is low)
Arbitrate for Isochronous Transmit
and Send One Isochronous Packet
All Channels Done
(DMDONE is low)
End of All Channels
Data Block Done
(DMDONE is low)
End of All Packets
For This Data Block
Yes
Yes
Yes
Yes
No
No
Yes
No
Handshake
(DMDONE is high)
DMREADY is Low
Yes
Handshake
Mode
Yes
No
No
No
NOTE A: DMEN and DMASYNC are configuration register bits, DMREADY is an input terminal, and DMDONE is an
output terminal.
Figure 5
2. Isochronous DM Flow Control (TSB12LV32 Transmit)
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參數(shù)描述
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