參數(shù)資料
型號(hào)： μPDPD30101
廠商： NEC Corp.
英文描述： 64-Bit Micro[rocessor(64位微處理器)
中文描述： 64位微[rocessor（64位微處理器）
文件頁數(shù)： 22/97頁
文件大小： 409K
代理商： ΜPDPD30101
μ
PD30101
21
Table 3-1. CP0 Registers
No.
Register
Description
0
Index
Programmable pointer to TLB array
1
Random
Dummy random pointer to TLB array (read-only)
2
Entry Lo0
Latter half of TLB entry for even-number VPN
3
Entry Lo1
Latter half of TLB entry for odd-number VPN
4
Context
Pointer to virtual PTE table of kernel in 32-bit mode
5
Page mask
Specifies page size
6
Wired
Number of wired TLB entries
7
—
RFU (Reserved for Future Use)
8
BadVAddr
Indicates virtual address at which error occurs last
9
Count
Timer count
10
Entry Hi
First half of TLB entry (including ASID)
11
Compare
Timer compare value
12
Status
Sets operation status
13
Cause
Indicates cause of last exception
14
EPC
Exception program counter
15
PRld
Processor revision ID
16
Config
Sets memory system mode
17
LLAddr
RFU
18
Watch Lo
Low-order bits of memory reference trap address
19
Watch Hi
High-order bits of memory reference trap address
20
X context
Pointer to virtual PTE table of kernel in 64-bit mode
21-25
—
RFU
26
Parity error
Parity bit of cache
27
Cache error
Error and status register of cache
28
Tag Lo
Cache tag register, low
29
Tag Hi
Cache tag register, high (reserved register)
30
Error EPC
Error exception program counter
31
—
RFU
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