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參數(shù)資料
| 型號(hào)： | μPDPD30101 |
| 廠商： | NEC Corp. |
| 英文描述： | 64-Bit Micro[rocessor(64位微處理器) |
| 中文描述： | 64位微[rocessor（64位微處理器） |
| 文件頁(yè)數(shù)： | 52/97頁(yè) |
| 文件大小： | 409K |
| 代理商： | ΜPDPD30101 |
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μ
PD30101
51
13. GIU (GENERAL-PURPOSE I/O UNIT)
13.1 General
The GIU controls the GPIO (0:11) pins and DCD pin. The GPIO (0:11) pins constitute a general-purpose I/O port, but
one of the GPIO pins is reserved for a specific application. The other 11 pins and DCD pins can be assigned interrupt
requests. As a trigger, the edge of the input level, low level, or high level can be selected.
Table 13-1. GIU Registers
Symbol
Function
GOUTENREG
General-purpose port I/O setting register
GPOTDATREG
General-purpose port data register
GINTSTREG
General-purpose port interrupt register
GINTENREG
General-purpose port interrupt enable register
GCINTSREG
General-purpose port interrupt trigger setting register
GLINTSREG
General-purpose port interrupt level setting register
Table 13-2. Outline of DCD and General-Purpose I/O Pins
Pin
Input Buffer Type
Interrupt Detection Clock (internal)
DCD
Note 1
—
MasterOut
GPIO11
I/O (Schmitt)
TClock
GPIO10
I/O (Schmitt)
MasterOut
GPIO9
Note 2
I/O (Schmitt)
MasterOut
GPIO8
I/O
TClock
GPIO7
I/O
TClock
GPIO6
I/O
TClock
GPIO5
I/O
TClock
GPIO4
I/O
TClock
GPIO3
I/O
TClock
GPIO2
I/O
TClock
GPIO1
I/O
TClock
GPIO0
I/O
TClock
Notes 1.
The DCD pin (input) is internally connected to bit 13 of the GPIO register.
This pin is used only as an input pin with GIU.
2.
Fix the GPIO9 pin to a battery lid lock detection signal (BATTLOCK).
Remark
All the pins are set in the input mode at reset.
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