參數(shù)資料
型號： μPDPD30101
廠商： NEC Corp.
英文描述： 64-Bit Micro[rocessor(64位微處理器)
中文描述： 64位微[rocessor（64位微處理器）
文件頁數(shù)： 64/97頁
文件大?。?/td> 409K
代理商： ΜPDPD30101
μ
PD30101
63
Table 19-2. CPU Instruction Set: Extended ISA (2/2)
Instruction
Description
Format
Branch instruction (2)
REGIMM
rs
sub
offset
BLTZL
Branch On Less Than Zero Likely
BLTZL
rs, offset
BGEZL
Branch On Greater Than Or Equal To Zero Likely
BGEZL
rs, offset
BLTZALL
Branch On Less Than Zero And Link Likely
BLTZALL rs, offset
BGEZALL
Branch On Greater Than Or Equal To Zero And Link Likely
BGEZALL rs, offset
Exception instruction
SPECIAL
rs
rt
rd
sa
funct
TGE
Trap If Greater Than Or Equal
TGE
rs, rt
TGEU
Trap If Greater Than Or Equal Unsigned
TGEU
rs, rt
TLT
Trap If Less Than
TLT
rs, rt
TLTU
Trap If Less Than Unsigned
TLTU
rs, rt
TEQ
Trap If Equal
TEQ
rs, rt
TNE
Trap If Not Equal
TNE
rs, rt
Exception immediate instruction
REGIMM
rs
sub
immediate
TGEI
Trap If Greater Than Or Equal Immediate
TGEI
rs, immediate
TGEIU
Trap If Greater Than Or Equal Immediate Unsigned
TGEIU
rs, immediate
TLTI
Trap If Less Than Immediate
TLTI
rs, immediate
TLTIU
Trap If Less Than Immediate Unsigned
TLTIU
rs, immediate
TEQI
Trap If Equal Immediate
TEQI
rs, immediate
TNEI
Trap If Not Equal Immediate
TNEI
rs, immediate
Table 19-3. System Control Coprocessor (CP0) Instruction Set
Instruction
Description
Format
System control coprocessor instruction (1)
COP0
sub
rt
rd
0
MFC0
Move From Coprocessor 0
MFC0
rt, rd
MTC0
Move To Coprocessor 0
MTC0
rt, rd
DMFC0
Doubleword Move From Coprocessor 0
DMFC0
rt, rd
DMTC0
Doubleword Move To Coprocessor 0
DMTC0
rt, rd
System control coprocessor instruction (2)
COP0
CO
funct
TLBR
Read Indexed TLB Entry
TLBR
TLBWI
Write Indexed TLB Entry
TLBWI
TLBWR
Write Random TLB Entry
TLBWR
TLBP
Probe TLB For Matching Entry
TLBP
ERET
Exception Return
ERET
System control coprocessor instruction (3)
COP0
CO
funct
STANDBY
Standby
STANDBY
SUSPEND
Suspend
SUSPEND
HIBERNATE
Hibernate
HIBERNATE
System control coprocessor instruction (4)
CACHE
base
sub
offset
CACHE
Cache Operation
CACHE
sub, offset (base)
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