參數(shù)資料
型號: μPDPD30101
廠商: NEC Corp.
英文描述: 64-Bit Micro[rocessor(64位微處理器)
中文描述: 64位微[rocessor(64位微處理器)
文件頁數(shù): 68/97頁
文件大小: 409K
代理商: ΜPDPD30101
μ
PD30101
67
DC Characteristics (T
A
= –10 to +70 °C, V
DD
= 3.0 to 3.6 V)
Parameter
Symbol
Condition
MIN.
TYP.
MAX.
Unit
High-level output voltage
V
OH
I
OH
= –2 mA
0.8 V
DD
V
I
OH
= –20
μ
A
V
DD
– 0.1
Low-level output voltage
V
OL
I
OL
= 2 mA
0.4
V
I
OL
= 20
μ
A
0.1
High-level input voltage
Note 1
V
IH1
2.0
V
DD
+ 0.3
V
Low-level input voltage
Note 1
V
IL1
–0.3
0.3 V
DD
V
Pulse less than 10 ns
–1.5
0.3 V
DD
V
High-level input voltage
Note 2
V
IH2
0.75 V
DD
V
DD
+ 0.3
V
Low-level input voltage
Note 2
V
IL2
–0.3
0.6
V
Pulse less than 10 ns
–1.5
0.6
V
Hysteresis voltage
Note 3
V
H
0.17 V
DD
V
Supply current
Note 4
I
DD
ADD (0:20) = 120 pF,
Other pins = 40 pF,
In Fullspeed mode
60
115
mA
External load: 0 pF, in Standby mode
30
50
External load: 0 pF, in Suspend mode
4
7
External load: 0 pF, in Hibernate mode
50
100
μ
A
μ
A
μ
A
μ
A
Input leakage current
Note 4
I
LI
V
DD
= 3.6 V, V
I
= V
DD
, 0 V
±5
High-level input leakage current
Note 5
I
LIH
V
DD
= 3.6 V, V
I
= V
DD
36
Output leakage current
I
LO
V
DD
= 3.6 V, V
I
= V
DD
, 0 V
±5
Notes 1.
Except CLKX1, POWER, RSTSW, RTCRST, BATTINH, BATTINT, and GPIO (9:10) pins
2.
Applied to POWER, RSTSW, RTCRST, BATTINH, BATTINT, and GPIO (9:10) pins
3.
Hysteresis voltage: Difference between the minimum voltage at which the high level of a Schmitt input
signal is not recognized when the signal goes from low to high and the maximum voltage at which
the low level is not recognized when the signal goes from high to low
4.
Except KPORT (0:7) (input pins with pull-down resistor)
5.
Applied to KPORT (0:7) (input pins with pull-down resistor)
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