- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371362 > 20736 Enhanced Am486DX Family Data Sheet? 1.87MB (PDF) PDF資料下載
參數(shù)資料
| 型號(hào)： | 20736 |
| 英文描述： | Enhanced Am486DX Family Data Sheet? 1.87MB (PDF) |
| 中文描述： | 增強(qiáng)Am486DX系列數(shù)據(jù)手冊？ 1.87MB（PDF格式） |
| 文件頁數(shù)： | 54/66頁 |
| 文件大小： | 1923K |
| 代理商： | 20736 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁當(dāng)前第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁
54
Enhanced Am486DX Microprocessor Family
P R E L I M I N A R Y
The other bits in TR4 (9:0) have no effect on the
cache write.
In TR5, load 0 into the Ext field (bit 19), the required
value into the Set State field (bits 18–17) (Write-
back mode only), the required index into the Index
field (bits 10–4), the required entry value into the
Entry field (bits 3–2), and 01 into the Control field
(bits 1–0). Loading the values into TR5 triggers the
cache write. In Write-through mode, the Set State
field is ignored, and the Valid bit (bit 10) in TR4 is
used instead to define the state of the specified set.
7.3.3
Example 3: Flushing The Cache
The cache flush mechanism functions in the same way
in Write-back and Write-through modes. Load 11 into
the Control field (bits 1–0) of TR5. All other fields are
ignored, except for Ext in Write-back mode. The cache
flush is triggered by loading the value into TR5. All of
the LRU bits, Valid bits, and Set State bits are cleared.
6.
8
Am486 MICROPROCESSOR
FUNCTIONAL DIFFERENCES
In addition to the new Enhanced Am486DX micropro-
cessors, Am486 microprocessors include the standard
Am486DX, the Am486DE2, and the Enhanced Am486
microprocessor families. Major differences in these pro-
cessors are highlighted in Table 20, and described be-
low.
8.1
The standard Am486DX processor supports an 8-Kbyte
write-through cache. Several important differences exist
between the standard Am486DX processors and the
Am486DE2 and Enhanced processors:
Standard Am486DX Processors
I
The ID register contains a different version signa-
ture.
I
The EADS function performs cache line write-backs
of modified lines to memory in Write-back mode.
I
A burst write feature is available for copy-backs. The
FLUSH pin and WBINVD instruction copy back all
modified data to external memory prior to issuing the
special bus cycle or reset.
I
The RESET state is invoked either after power up or
after the RESET signal is applied according to the
standard 486DX microprocessor specification.
I
After reset, the STATUS bits of all lines are set to 0.
The LRU bits of each set are placed in a starting
state.
8.2
The Am486DE2 processors also provide a 8-Kbyte
write-through cache, and add flexible clock control and
enhanced SMM.
Am486DE2 Microprocessors
I
Nine signals were added to support new features:
CACHE, HITM, INV, SMI, SMIACT, SRESET,
STPCLK, VOLDET, and WB/WT.
8.3
The Enhanced Am486 microprocessors add support for
write-back cache and 3x clock mode (running at three
times the system bus speed).
Enhanced Am486 Microprocessors
I
The CLKMUL signal was added to support clock-
tripled mode.
I
The following pins have new functions to implement
write-back cache protocol: AHOLD, BLAST, CLK,
EADS, FLUSH, and PLOCK.
8.4
Enhanced Am486DX Microprocessor
Family
The Enhanced Am486DX microprocessors add support
for 4x clock mode and 16-Kbyte cache. The Enhanced
Am486DX microprocessors are functionally identical to
the Am486DE2 and Enhanced Am486 family proces-
sors except for:
I
The function of the CLKMUL pin (see page 13) to
set the new clock speed.
I
The redefinition of TR4 and TR5 to access the 16-
Kbyte cache (see section 7 on page 51).
Table 20. Am486 Family Functional Differences
Processor
Cache
Clock
Major Enhancements to Standard
DX
Standard Am486DX processors
Am486DE2 processors
Enhanced Am486 Microprocessor Family
(Am486DX2, Am486DX4)
Enhanced Am486DX Microprocessor Family
(Am486DX2, Am486DX4, Am486DX5)
8-Kbyte write-through
8-Kbyte write-through
1x, 2x
2x
Flexible clock control, enhanced SMM
8-Kbyte write-back
2x, 3x
Above plus write-back cache
16-Kbyte write-back
2x, 3x, 4x
Above plus 16-Kbyte write-back cache,
extended temperature
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 2075 | data delay devices |
| 208-501-21-38 | LED TELEFONSOCKEL T6.8 12V ROT |
| 208-521-21-38 | LED TELEFONSOCKEL T6.8 12V GELB |
| 208-532-21-38 | LED TELEFONSOCKEL T6.8 12V GRUEN |
| 208-930-21-38 | LED TELEFONSOCKEL T6.8 12V BLAU |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 207360-1 | 功能描述:管腳和插座連接器 3P PLUG HOUSING RoHS:否 制造商:Molex 系列:1561 產(chǎn)品類型:Contacts 觸點(diǎn)類型:Socket (Female) 節(jié)距: 位置/觸點(diǎn)數(shù)量: 排數(shù): 安裝風(fēng)格:Wire 端接類型:Crimp 外殼材料: 觸點(diǎn)材料:Brass 觸點(diǎn)電鍍:Tin 電壓額定值: 電流額定值: |
| 20-7360-10 | 功能描述:IC 與器件插座 ELEVATOR STRIP LINE 20 PINS RoHS:否 制造商:Molex 產(chǎn)品:LGA Sockets 節(jié)距:1.02 mm 排數(shù): 位置/觸點(diǎn)數(shù)量:2011 觸點(diǎn)電鍍:Gold 安裝風(fēng)格:SMD/SMT 端接類型:Solder 插座/封裝類型:LGA 2011 工作溫度范圍:- 40 C to + 100 C |
| 207363-000 | 制造商:TE Connectivity 功能描述:MTC50-YH2-004 |
| 207365-1 | 功能描述:管腳和插座連接器 PIN HDR ASSY METRIMATE 3P RoHS:否 制造商:Molex 系列:1561 產(chǎn)品類型:Contacts 觸點(diǎn)類型:Socket (Female) 節(jié)距: 位置/觸點(diǎn)數(shù)量: 排數(shù): 安裝風(fēng)格:Wire 端接類型:Crimp 外殼材料: 觸點(diǎn)材料:Brass 觸點(diǎn)電鍍:Tin 電壓額定值: 電流額定值: |
| 207365-3 | 功能描述:管腳和插座連接器 PIN HEADER 3P RoHS:否 制造商:Molex 系列:1561 產(chǎn)品類型:Contacts 觸點(diǎn)類型:Socket (Female) 節(jié)距: 位置/觸點(diǎn)數(shù)量: 排數(shù): 安裝風(fēng)格:Wire 端接類型:Crimp 外殼材料: 觸點(diǎn)材料:Brass 觸點(diǎn)電鍍:Tin 電壓額定值: 電流額定值: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。