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參數(shù)資料
| 型號(hào)： | GT-48001A |
| 廠商： | Galileo Technology Services, LLC |
| 英文描述： | Switched Ethernet Controller For 10BaseX(10BaseX交換式快速以太網(wǎng)控制器) |
| 中文描述： | 交換式以太網(wǎng)控制器10BaseX（10BaseX交換式快速以太網(wǎng)控制器） |
| 文件頁數(shù)： | 22/101頁 |
| 文件大?。?/td> | 1235K |
| 代理商： | GT-48001A |
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GT-48001A Switched Ethernet Controller
Revision 1.6
27
8.
Unicast Intervention Mode
The GT-48001A supports a powerful feature called Intervention Mode for unicast packets. Intervention in Unicast traffic
is optional per MAC address. Each entry in the Address Table includes an Intervention bit for the destination address
(bit 62) and the source address. When an Intervention mode bit is set, the GT-48001A will
not forward the packet auto-
matically to the destination device. Instead, the GalNet device will send a BUFFER_REQUEST message (Section
10.3.3) to CPU memory. The BUFFER_REQUEST messages will be sent to the buffer area in the CPU main memory
which contains 256 entries of dual 32-bit words. The location of this CPU memory is specified by the CPU Intervention
Base Address at 0x140048. The buffer area is pointed to by this Base Address register and a Shadow register at this
same offset. The BUFFER_REQUEST message includes information about the routing of the packet (Source and Tar-
get port/device numbers). The CPU then has the option to:
discard the packet
forward the packet to a specific device
request the packet be transferred to CPU buffer memory
Figure 4 shows a Unicast packet transfer using Intervention mode.
Figure 4: Unicast Packet Transfer With Intervention
The sequence illustrated is as follows:
1.
The incoming packet is fed to the Rx FIFO and transferred to an empty block in the Receive Buffer area of DRAM.
2.
If a corresponding Intervention bit is set, the device sends a BUFFER_REQUEST message (Section 10.3.3) to the
CPU’s Intervention Base Address. The BUFFER_REQUEST includes the source port and the source buffer
address
The CPU then has the following options:
1.
Discard the packet.
The CPU sends a START_OF_PACKET message (Section 10.3.6) to the source device with the Byte Count
field cleared with all 0s (arrow #3).
2.
Forward the Packet to a port in the same device
CPU
PCI BUS
GT-48001A
DRAM
GT-48001A
DRAM
1
23
5
6
4
7
DRAM
Messages
Packets
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