- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄67672 > GT-48001A (Galileo Technology Services, LLC) Switched Ethernet Controller For 10BaseX(10BaseX交換式快速以太網(wǎng)控制器) PDF資料下載
參數(shù)資料
| 型號(hào)： | GT-48001A |
| 廠商： | Galileo Technology Services, LLC |
| 英文描述： | Switched Ethernet Controller For 10BaseX(10BaseX交換式快速以太網(wǎng)控制器) |
| 中文描述： | 交換式以太網(wǎng)控制器10BaseX（10BaseX交換式快速以太網(wǎng)控制器） |
| 文件頁(yè)數(shù)： | 54/101頁(yè) |
| 文件大小： | 1235K |
| 代理商： | GT-48001A |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)當(dāng)前第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)
GT-48001A Switched Ethernet Controller
56
Revision 1.6
Figure 12: ChipSel* Timing, 1 Word Burst Read
Figure 13: ChipSel* Timing, 3 Word Burst Read
13.2.1 Data Structure Format
Figure 14 shows the format of the STS data structure. The first word includes information about the destination port(s)
for this packet indicated by the first 8 bits. This word is useful for multicast packets only and is read back by the GT-
48001A by a one word burst read. The next word is the byte count and the type of packet, indicated by bit 21 (1 = mul-
ticast, 0 = unicast), also read back by the GT-48001A with a one word burst read. The third fourth and fifth word
includes the Destination Address and the Source Address read back by the GT-48001A with a three word burst read.
The assertion of this data is indicated by Chipsel*, a dedicated output pin. Please note that the assertion of the
ChipSel* does not necessarily happen in consecutive cycles. In other words, the RMON data is not read back by the
GT-48001A in three consecutive bursts.
T1 = GT-48001A CLK to Signal Delay (2 to 17ns)
T2 = DRAM Access Time from CAS* (0 to 15ns)
VALID DATA
.
T1
T2
T3
0ns
50ns
100ns
150ns
200ns
CLK (33 MHz)
RAS*
CAS*
ChipSel*
DDATA
T3 = DRAM Turn off Delay from RAS* (3 to 15ns)
T1 = GT-48001A CLK to Signal Delay (2 to 17ns)
T2 = DRAM Access Time from CAS* (15ns MAX)
T3 = DRAM Turn off Delay from RAS* (3 to 15ns)
VALID
VALID DATA
T1
T2
T4
T3
0ns
100ns
200ns
CLK (33 MHz)
RAS*
CAS*
ChipSel*
DDATA
T4 = Data Output Hold After CAS* LOW (5 MIN)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GT-48002A | Switched Fast Ethernet Controller for 100BaseX(100BaseX交換式快速以太網(wǎng)控制器) |
| GT-48004A | Four Port Switched Fast Ethernet Controller(四端口、交換式快速以太網(wǎng)控制器) |
| GT-48006A | Low Cost Two Port 10/100Mbps Ethernet Bridge/Switch Controller(低成本、雙端口10/100Mbps以太網(wǎng)橋式/交換式控制器) |
| GT-48207 | Advanced Switched Ethernet Controllers for 10+10/100 BaseX(高級(jí)交換式 10+10/100 BaseX以太網(wǎng)控制器) |
| GT-48208 | Advanced Switched Ethernet Controllers for 10+10/100 BaseX(高級(jí)交換式 10+10/100 BaseX以太網(wǎng)控制器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GT482 | 制造商:CORNELL DUBILIER ELECTRONICS 功能描述:Cap Ceramic 82pF 3000V SL 5% (12 X 6mm) Radial 9.5mm 85°C |
| GT48212-A6-PBB1C000 | 制造商:Marvell 功能描述: |
| GT48212-A6-PBB-C000 | 制造商:Marvell 功能描述:12 PORT E + 2 PORT FE SWITCH (MANAGED) - Trays |
| GT48300-A1-BBE1C083 | 制造商:Marvell 功能描述:Marvell GT48300-A1-BBE1C083 |
| GT48300-A1-BBE-C000 | 制造商:Marvell 功能描述:Marvell GT48300-A1-BBE-C000 |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。