參數(shù)資料
型號(hào)： GT-48001A
廠商： Galileo Technology Services, LLC
英文描述： Switched Ethernet Controller For 10BaseX(10BaseX交換式快速以太網(wǎng)控制器)
中文描述： 交換式以太網(wǎng)控制器10BaseX（10BaseX交換式快速以太網(wǎng)控制器）
文件頁(yè)數(shù)： 48/101頁(yè)
文件大?。?/td> 1235K
代理商： GT-48001A
GT-48001A Switched Ethernet Controller
50
Revision 1.6
The pre-distortion signal is generated using 4 exclusive-OR (XOR) gates (74AC86) as non-inverting and inverting buff-
ers and a set of standard summing resistors typically used in 10BT filters/transformers.
TxD, TxDDel and TxEn are connected to the XOR gates as follows:
TXD is connected to XOR1/in1 and XOR2/in1
TXDDEL is connected to XOR3/in1 and XOR4/in1
TXEN is connected to XOR2/in2 and XOR3/in2
XOR2/in2 and XOR4/in2 are connected to ground
The XOR gates outputs provide the signals shown in Table 25.
The connection to the summing resistors is shown in Figure 8.
Figure 8: Summing Resistor Setup
This connection is described in the GT-48001/1A Serial Interface Application Note located in the library section of the
www site (http://www.galileoT.com).
12.12.2.2 Pol Output/Auto-Polarity in 10BaseT
The default value for the GT-48001A is to have the Auto-Polarity function enabled. The default value for the GT-
48001(non-A), is to have the Auto-Polarity function disabled. The Pol output, in a 10Base-T configured port, should be
connected in a manner that prevents the assertion of link pulses at the GT-48001/1A RxLP input when the detected
polarity (indicated by the Pol output) does not match the correct polarity of the RxD pair.
Pol = 1 matches a correct RxD pair connection; Pol = 0 matches a crossed RxD pair. Such connection is specified in
Galileo's 10Base-T application note. A crossed RxD pair will prevent the GT-48001/1A from seeing the link pulses
which in turn cause the port to enter link-test-fail state. As a result, the Pol output will start to toggle, remaining at 0 or 1
for ~0.5 Seconds. Once the Pol reaches a state in which link-pulses are decoded and asserted at the GT-48001/1A
RxLP input, the port will exit from link-test-fail and the Pol output will stabilize. If the user does not connect the Pol out-
Table 27: XOR Gate Outputs
Si g n a l
Na m e
XOR Ga t e
Ou tp u t
Va lu e wh en TxE n = 0
( no Tr ansmi t )
Va lu e w h e n Tx En =1
(Tra n s mi t )
Bu ffe r Ty pe
TxD+
XOR1
TxD
non-inverting
TxP-
XOR3
TxDDel
inverted TxDDel
inverting
TxD-
XOR2
TxD
inverted TxD
inverting
TxP+
XOR4
TxDDel
non-inverting
R1
R2
R3
R4
R5
To filter and TxP
To filter and TxN
R1 = R3 = 61.9 Ohm +/- 1%
R2 = R4 = 422 Ohm +/- 1%
R5 = 1.21 KOhm +/- 1%
TxD+
TxP-
TxD-
TxP+
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