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| 型號： | GT-48001A |
| 廠商： | Galileo Technology Services, LLC |
| 英文描述： | Switched Ethernet Controller For 10BaseX(10BaseX交換式快速以太網(wǎng)控制器) |
| 中文描述： | 交換式以太網(wǎng)控制器10BaseX（10BaseX交換式快速以太網(wǎng)控制器） |
| 文件頁數(shù)： | 44/101頁 |
| 文件大小： | 1235K |
| 代理商： | GT-48001A |
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GT-48001A Switched Ethernet Controller
Revision 1.6
47
12.6
Link Integrity and Auto Polarity Detector
The GT-48001A implements the Link Integrity test as specified in the IEEE 802.3 10Base-T and 10Base-FL supple-
ments. The GT-48001A generates the link integrity signals on ports configured to either 10Base-T and 10Base-FL
modes. In addition, the GT-48001A provides an Auto Polarity method for 10Base-T, to switch the polarity of the data
going into the MAC layer accordingly. The default, value is Auto-Polarity enabled.
12.7
Data Blinder
The data blinder field (DataBlind in the Serial Parameters register) sets the period of time during which the port does
not look at the wire to decide to transmit (inhibit time.) The default value is 6.4us.
12.8
Inter-Packet Gap (IPG)
IPG is the idle time between any two successive packets from the same port. The default (from the standard) is 9.6us
for 10Mbps Ethernet and 960nsec for 100-Mbps Fast Ethernet. Note that the IPG can be made smaller or larger than
the Ethernet standards by programming. Making the IPG smaller can improve test scores at the cost of Ethernet com-
patibility (a trick used by many vendors during head-to-head magazine tests.) We do not recommend this mode of
operation, however, as it violates IEEE standards.
IPG is programmable in the Serial Parameters register.
12.9
Partition Mode
A port enters Partition Mode when more than 32 consecutive collisions are seen on the port. When in Partition Mode,
the port continues to transmit but it will not receive. The PaEn bit in the corresponding Port Control register is set when
a port is partitioned. A port is returned to normal operation mode when a good packet is seen on the wire.
12.9.1 Enabling Partition Mode
Partition is enabled (for all ports) by setting the enable bit in the GT-48001A Control Register. The default value is Par-
tition disabled for all ports. You must have a CPU in the system to enable partition mode, there is no pin strapping
option.
12.9.2 Entering Partition State
When Partition is enabled, a port will enter Partition state when either of the following two situations occur:
The port detects a collision on every one of 32 consecutive retransmit attempts of the same packet.
The port detects a single collision which occurs for more than 2048 bit times (i.e. most likely to occur in AUI
mode).
While in Partition state:
If the interrupt is not masked, the GT-48001A will issue an interrupt to the CPU upon entering Partition state,
and will set the partition bit of that port in the Interrupt Cause register.
The port will continue to transmit its pending packet, regardless of the collision detection, and will not follow the
usual Backoff Algorithm. Additional packets pending for transmission, will be transmitted, while ignoring the
internal collision indication. This frees the port's transmit buffers which would otherwise be filled up at the
expense of the other ports' buffers. The assumption is that Partition is a system failure situation (bad connec-
tor/cable/station), thus losing the transmitted packets is a small price to pay vs. the cost of halting the 8-port
switch by filling up all of its buffers.
The Partition Indication is available via the LED interface (both the status led - blinking twice, and a dedicated
led - on constantly).
12.9.3 Exiting from Partition State
The port will exit from Partition state, following the end of a successful packet transmission. A successful packet trans-
mission will be declared, if no collisions were detected on the first 512 bits of the transmission. If the interrupt is not
masked, the GT-48001A will issue an interrupt to the CPU upon exiting from Partition state, and will clear the partition
bit of that port in the Interrupt Cause register.
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