![](http://datasheet.mmic.net.cn/110000/GT-48001A_datasheet_3491730/GT-48001A_62.png)
GT-48001A Switched Ethernet Controller
62
Revision 1.6
information about an Error Source Address. The data format is as follows:
14.7
Enabling/Disabling EASE Functionality
An explicit HP EASE enable/disable bit is provided in the Global Control register for the GT-48001A device. When HP
EASE is disabled using this bit, no EASE samples nor Error Source messages are sent to the CPU. HP EASE packet
sampling can be disabled on a port anytime the internal counter can not be reloaded with a new skip count because the
CPU has not provided any new values via the Ease_Register. Interrupt conditions generated by an empty
Ease_Register can be masked by appropriate bits in the Ease_Full_Mask and/or Interrupt Cause registers.
14.8
Interaction With Other GT-48001A Features
Some GT-48001A features are incompatible with HP EASE, and will require that HP EASE be disabled. In most cases,
it can be the responsibility of software to assure that HP EASE is disabled when used with other GT-48001A features.
Broadcast Intervention Mode: HP EASE is independent of broadcast intervention mode.
Unicast Intervention Mode: HP EASE should be disabled when using this mode.
Sniffer Mode: HP EASE should be disabled on the GT-48001A device which one of its ports has been config-
ured to work in monitoring mode (e.g. that port’s RX and TX traffic are sent to the Sniffer).
RMON Station-to-Station Matrix: HP EASE is independent of the Station-to-Station Matrix feature.
Spanning Tree Support: HP EASE may only be enabled on GT-48001A which has its ports configured in the
forwarding state. If the global Spanning Tree enable bit is set and the port is blocked, listening or learning, HP
EASE should not be enabled. If the global Spanning Tree enable bit is clear or the port is in the forwarding
state, HP EASE can be enabled. It can be the responsibility of software to assure that EASE is enabled cor-
rectly when used with Spanning Tree features.
Address Learning: HP EASE in no way impacts the learning process of the GT-48001A device.
LED Serial Interface: EASE packet sample indications are accessible via the serial LED interface mainly for
debug purpose. LedData bit # 125: EASE sample indication for port 0. LedData bit # 126: EASE sample indica-
tion for port 1. (LedData bit#1 is the bit on which LedStb is HIGH). The LED circuit implements a “monostable”
stretching function to enable viewing these dynamic signals.
PCI Bi ts
D escr ipt i o n
Address
[31:8]
[7:3]
[2:0]
ErrorSourceBaseAdd
offset pointer to entry
‘000’
Data 0
[31:3]
[2]
[1]
[0]
MAC address [19:47]
1 - Late Collision Error
1 - FCS Error
1 - Over Count Error
Data 1
[31:27]
[26:24]
[23:19]
[18:0]
reserved
Port # (bit 26 is MSB)
Device# (bit 23 is MSB)
MAC address [0:18]