參數(shù)資料
型號(hào)： LXT971A
廠商： Intel Corp.
英文描述： 3.3V Dual-Speed Fast Ethernet PHY Transceiver
中文描述： 3.3雙速快速以太網(wǎng)物理層收發(fā)器
文件頁(yè)數(shù)： 40/90頁(yè)
文件大?。?/td> 568K
代理商： LXT971A
LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver
40
Datasheet
Document #: 249414
Revision #: 002
Rev. Date: August 7, 2002
Table 11. 4B/5B Coding
Code Type
4B Code
3 2 1 0
Name
5B Code
4 3 2 1 0
Interpretation
DATA
0 0 0 0
0
1 1 1 1 0
Data 0
0 0 0 1
1
0 1 0 0 1
Data 1
0 0 1 0
2
1 0 1 0 0
Data 2
0 0 1 1
3
1 0 1 0 1
Data 3
0 1 0 0
4
0 1 0 1 0
Data 4
0 1 0 1
5
0 1 0 1 1
Data 5
0 1 1 0
6
0 1 1 1 0
Data 6
0 1 1 1
7
0 1 1 1 1
Data 7
1 0 0 0
8
1 0 0 1 0
Data 8
1 0 0 1
9
1 0 0 1 1
Data 9
1 0 1 0
A
1 0 1 1 0
Data A
1 0 1 1
B
1 0 1 1 1
Data B
1 1 0 0
C
1 1 0 1 0
Data C
1 1 0 1
D
1 1 0 1 1
Data D
1 1 1 0
E
1 1 1 0 0
Data E
1 1 1 1
F
1 1 1 0 1
Data F
IDLE
undefined
I
1
1 1 1 11
Used as inter-stream fill code
CONTROL
0 1 0 1
J
2
1 1 0 0 0
Start-of-Stream Delimiter (SSD),
part 1 of 2
0 1 0 1
K
2
1 0 0 0 1
Start-of-Stream Delimiter (SSD),
part 2 of 2
undefined
T
3
0 1 1 0 1
End-of-Stream Delimiter (ESD),
part 1 of 2
undefined
R
3
0 0 1 1 1
End-of-Stream Delimiter (ESD),
part 2 of 2
1. The /I/ (Idle) code group is sent continuously between frames.
2. The /J/ and /K/ (SSD) code groups are always sent in pairs; /K/ follows /J/.
3. The /T/ and /R/ (ESD) code groups are always sent in pairs; /R/ follows /T/.
4. An /H/ (Error) code group is used to signal an error condition.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LXT971ABC 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN TRANSCEIVER|SINGLE|CMOS|BGA|64PIN|PLASTIC
LXT971ABE 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:3.3V Dual-Speed Fast Ethernet PHY Transceiver
LXT971ALC 制造商:Intel 功能描述:LAN Transceiver, Single, 64 Pin, Plastic, QFP 制造商:Intellon Corporation 功能描述:LAN Transceiver, Single, 64 Pin, Plastic, QFP 制造商:Level One 功能描述:LAN Transceiver, Single, 64 Pin, Plastic, QFP
LXT971ALE 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:3.3V Dual-Speed Fast Ethernet PHY Transceiver
LXT971LC 制造商:Intel 功能描述:
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