- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377799 > LXT971A (Intel Corp.) 3.3V Dual-Speed Fast Ethernet PHY Transceiver PDF資料下載
參數(shù)資料
| 型號： | LXT971A |
| 廠商： | Intel Corp. |
| 英文描述： | 3.3V Dual-Speed Fast Ethernet PHY Transceiver |
| 中文描述： | 3.3雙速快速以太網(wǎng)物理層收發(fā)器 |
| 文件頁數(shù)： | 6/90頁 |
| 文件大小： | 568K |
| 代理商： | LXT971A |
第1頁第2頁第3頁第4頁第5頁當(dāng)前第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁
LXT971A 3.3 V Dual-Speed Fast Ethernet Transceiver
6
Datasheet
Document #: 249414
Revision #: 002
Rev. Date: August 7, 2002
Tables
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
LQFP Numeric Pin List.................................................................................................... 12
LXT971A MII Signal Descriptions.................................................................................. 14
LXT971A Network Interface Signal Descriptions........................................................... 15
LXT971A Miscellaneous Signal Descriptions................................................................. 16
LXT971A Power Supply Signal Descriptions.................................................................. 17
LXT971A JTAG Test Signal Descriptions ...................................................................... 17
LXT971A LED Signal Descriptions ................................................................................ 17
Hardware Configuration Settings..................................................................................... 26
Carrier Sense, Loopback, and Collision Conditions......................................................... 32
4B/5B Coding................................................................................................................... 36
BSR Mode of Operation................................................................................................... 43
Supported JTAG Instructions........................................................................................... 43
Device ID Register ........................................................................................................... 43
Magnetics Requirements .................................................................................................. 44
I/O Pin Comparison of NIC and Switch RJ-45 Setups..................................................... 44
Absolute Maximum Ratings............................................................................................. 49
Operating Conditions........................................................................................................ 49
Digital I/O Characteristics 1............................................................................................. 50
Digital I/O Characteristics - MII Pins............................................................................... 50
I/O Characteristics - REFCLK/XI and XO Pins............................................................... 50
I/O Characteristics - LED/CFG Pins................................................................................ 50
100BASE-TX Transceiver Characteristics....................................................................... 51
100BASE-FX Transceiver Characteristics....................................................................... 51
10BASE-T Transceiver Characteristics............................................................................ 51
10BASE-T Link Integrity Timing Characteristics ........................................................... 52
100BASE-TX Receive Timing Parameters - 4B Mode.................................................... 53
100BASE-TX Transmit Timing Parameters - 4B Mode.................................................. 54
100BASE-FX Receive Timing Parameters...................................................................... 55
100BASE-FX Transmit Timing Parameters..................................................................... 56
10BASE-T Receive Timing Parameters........................................................................... 57
10BASE-T Transmit Timing Parameters......................................................................... 58
10BASE-T Jabber and Unjabber Timing Parameters....................................................... 59
10BASE-T SQE Timing Parameters................................................................................ 59
Auto Negotiation and Fast Link Pulse Timing Parameters.............................................. 60
MDIO Timing Parameters................................................................................................ 61
Power-Up Timing Parameters.......................................................................................... 62
RESET Pulse Width and Recovery Timing Parameters.................................................. 62
Register Set....................................................................................................................... 63
Register Bit Map............................................................................................................... 64
Control Register (Address 0)............................................................................................ 66
MII Status Register #1 (Address 1).................................................................................. 67
PHY Identification Register 1 (Address 2)....................................................................... 68
PHY Identification Register 2 (Address 3)....................................................................... 68
Auto Negotiation Advertisement Register (Address 4).................................................... 69
Auto Negotiation Link Partner Base Page Ability Register (Address 5)......................... 70
Auto Negotiation Expansion (Address 6)......................................................................... 71
Auto Negotiation Next Page Transmit Register (Address 7)........................................... 71
Auto Negotiation Link Partner Next Page Receive Register (Address 8)........................ 72
Configuration Register (Address 16, Hex 10).................................................................. 73
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LXT972A | 3.3V Dual-Speed Fast Ethernet Transceiver Datasheet |
| LXT972ALC | 3.3V Dual-Speed Fast Ethernet Transceiver Datasheet |
| LXT972M | Single-Port 10/100 Mbps PHY Transceiver |
| LXT9763 | Fast Ethernet 10/100 Hex Transceiver with Full MII |
| LXT9763HC | LAN TRANSCEIVER|HEX|QFP|208PIN|PLASTIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LXT971ABC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN TRANSCEIVER|SINGLE|CMOS|BGA|64PIN|PLASTIC |
| LXT971ABE | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:3.3V Dual-Speed Fast Ethernet PHY Transceiver |
| LXT971ALC | 制造商:Intel 功能描述:LAN Transceiver, Single, 64 Pin, Plastic, QFP 制造商:Intellon Corporation 功能描述:LAN Transceiver, Single, 64 Pin, Plastic, QFP 制造商:Level One 功能描述:LAN Transceiver, Single, 64 Pin, Plastic, QFP |
| LXT971ALE | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:3.3V Dual-Speed Fast Ethernet PHY Transceiver |
| LXT971LC | 制造商:Intel 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。