參數(shù)資料
型號: LXT971A
廠商: Intel Corp.
英文描述: 3.3V Dual-Speed Fast Ethernet PHY Transceiver
中文描述: 3.3雙速快速以太網(wǎng)物理層收發(fā)器
文件頁數(shù): 64/90頁
文件大?。?/td> 568K
代理商: LXT971A
LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver
64
Datasheet
Document #: 249414
Revision #: 002
Rev. Date: August 7, 2002
Figure 31. 100BASE-FX Transmit Timing
Table 32. 100BASE-FX Transmit Timing Parameters
Parameter
Symbol
Min
Typ
1
Max
Units
2
Test Conditions
TXD<3:0>, TX_EN, TX_ER setup to
TX_CLK High
t1
12
ns
TXD<3:0>, TX_EN, TX_ER hold from
TX_CLK High
t2
0
ns
TX_EN sampled to CRS asserted
t3
17
20
BT
TX_EN sampled to CRS de-asserted
t4
22
24
BT
TX_EN sampled to TPFO out (Tx
latency)
t5
5
5.3
BT
1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production
testing.
2. BT is the duration of one bit as transferred to and from the MAC and is the reciprocal of the bit rate.
100BASE-T bit time = 10
s or 10 ns.
t1
t2
t5
t3
t4
0ns
250ns
TXCLK
TX_EN
TXD<3:0>
TPFO
CRS
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