參數(shù)資料
型號(hào)： LXT971A
廠商： Intel Corp.
英文描述： 3.3V Dual-Speed Fast Ethernet PHY Transceiver
中文描述： 3.3雙速快速以太網(wǎng)物理層收發(fā)器
文件頁(yè)數(shù)： 65/90頁(yè)
文件大?。?/td> 568K
代理商： LXT971A
LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver
Datasheet
Document #: 249414
Revision #: 002
Rev. Date: August 7, 2002
65
Figure 32. 10BASE-T Receive Timing
Table 33. 10BASE-T Receive Timing Parameters
Parameter
Sym
Min
Typ
1
Max
Units
2
Test Conditions
RXD, RX_DV, RX_ER Setup to
RX_CLK High
t1
10
–
–
ns
–
RXD, RX_DV, RX_ER Hold from
RX_CLK High
t2
10
–
–
ns
–
TPFIP/N in to RXD out (Rx latency)
t3
4.2
–
6.6
BT
–
CRS asserted to RXD, RX_DV,
RX_ER asserted
t4
5
–
32
BT
–
RXD, RX_DV, RX_ER de-asserted to
CRS de-asserted
t5
0.3
–
0.5
BT
–
TPFI in to CRS asserted
t6
2
–
28
BT
–
TPFI quiet to CRS de-asserted
t7
6
–
10
BT
–
TPFI in to COL asserted
t8
1
–
31
BT
–
TPFI quiet to COL de-asserted
t9
5
–
10
BT
–
1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production
testing.
2. BT is the duration of one bit as transferred to and from the MAC and is the reciprocal of the bit rate.
10BASE-T bit time = 10
s or 100 ns.
RX_CLK
RXD,
RX_DV,
RX_ER
CRS
TPFI
t
3
t
4
t
2
t
6
t
1
t
7
t
5
COL
t
8
t
9
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