![](http://datasheet.mmic.net.cn/Exar-Corporation/XRT79L71IB-F_datasheet_100145/XRT79L71IB-F_21.png)
PRELIMINARY
XRT79L71
6
REV. P2.0.0
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
Figure 2 indicates that the XRT79L71 consists of the following functional blocks.
The Transmit Payload Data Input Interface Block
The Transmit Overhead Data Input Interface Block
The Transmit LAPD Controller Block
The Transmit FEAC Controller Block (DS3, C-bit Parity Applications Only)
The Transmit Trail-Trace Message Controller Block (E3, ITU-T G.832 Applications Only)
The Transmit SSM Controller Block (E3, ITU-T G.832 Applications Only)
The Transmit DS3/E3 Framer Block
The Transmit DS3/E3 LIU Block
The Receive DS3/E3 LIU Block
The Receive DS3/E3 Framer Block
The Receive SSM Controller Block (E3, ITU-T G.832 Applications Only)
The Receive Trail-Trace Message Controller Block (E3, ITU-T G.832 Applications Only)
The Receive FEAC Controller Block (DS3, C-bit Parity Applications Only)
The Receive LAPD Controller Block
The Receive Payload Data Output Interface Block
The Receive Overhead Data Output Interface Block
Each of these functional blocks is briefly discussed below.
These functional blocks will be discussed in
considerable detail throughout this data sheet.
FIGURE 2. THE FUNCTIONAL BLOCK DIAGRAM OF THE XRT79L71 WHEN IT HAS BEEN CONFIGURED TO OPERATE IN
THE
CLEAR-CHANNEL DS3/E3 FRAMER MODE
Transmit Payload
Data Input
Interface Block
Transmit DS3/E3
Framer Block
DS3/E3
Jitter
Attenuator
Block
DS3/E3
Jitter
Attenuator
Block
DS3/E3
Jitter
Attenuator
Block
DS3/E3
Jitter
Attenuator
Block
Receive DS3/E3
Framer Block
Receive Payload
Data Output
Interface Block
Microprocessor
Interface
TxSer
TxNib[3:0]
TxInClk
MOTO
D[7:0]
A[8:0]
IntB*
CSB*
RdB_DS
WrB_RW
Rdy_Dtck
Reset*
ALE_AS
RxSer
RxNib[3:0]
RxOutClk
Tx LAPD Buffer/
Controller
Rx LAPD Buffer/
Controller
Transmit Overhead
Input
Interface Block
Receive Overhead
Output
Interface Block
TxOHClk
TxOHIns
TxOHInd
TxOH
TxOHEnable
TxOHFrame
TxNibClk
TxFrame
RxNibClk
RxFrame
RxOHFrame
RxOH
RxOHClk
RxOHEnable
RxOHInd
Transmit
DS3/E3
LIU Block
Transmit
DS3/E3
LIU Block
Receive
DS3/E3
LIU Block
Receive
DS3/E3
LIU Block
TTIP
TRING
RTIP
RRING
Only one JA exists.
Can be configured in
Tx or Rx Path