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PRELIMINARY
XRT79L71
116
REV. P2.0.0
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
Transmit FEAC Controller block is currently transmitting the FEAC Message to the Remote Terminal. This bit-
field will toggle to "0" upon completion of the 10th transmission of the FEAC Code Message. The Transmit
FEAC Controller block will generate an interrupt if enabled to the local P/C, upon completion of the 10th
transmission of the FEAC Message. The purpose of having the XRT79L71 generating this interrupt is to let the
local P/C know that the Transmit FEAC Controller block is now available and ready to transmit a new FEAC
message. Finally, once the Transmit FEAC Controller block has completed its 10th transmission of a FEAC
Code Message it will continue to send the same FEAC Message for an indefinite period until the local P/C
commands it to transmit a new FEAC message.
Figure 50 presents a flow chart depicting how to use the Transmit FEAC Controller block.
NOTES:
1.
The whiteboxes in
Figure 50 indicate the steps that the user must employ in order to command the Transmit
FEAC Controller block to transmit a FEAC message.
2.
The shaded boxes indicate the steps that the Transmit FEAC Controller block will execute in order to transmit a
FEAC message.
For a detailed description of the Receive FEAC Controller block, please see
Section 4.3.4.4.2.4
TRANSMIT LAPD CONTROLLER BLOCK
The Transmit LAPD Controller block is the third functional block within the Transmit Direction of the XRT79L71
that we will discuss for Clear-Channel Framer Applications. Figure 51 presents an illustration of the Transmit
Direction circuitry whenever the XRT79L71 has been configured to operate in the DS3 Clear-Channel Framer
Mode, with the Transmit LAPD Controller block highlighted.
FIGURE 50. A FLOW CHART DEPICTING HOW TO TRANSMIT A FEAC MESSAGE VIA THE FEAC TRANSMITTER
START
WRITE SIX-BIT “OUTBOUND” FEAC VALUE
INTO THE TxDS3 FEAC Register
This register is located at Direct Address 0xNE32
WRITE SIX-BIT “OUTBOUND” FEAC VALUE
INTO THE TxDS3 FEAC Register
This register is located at Direct Address 0xNE32
ENABLE THE TRANSMIT FEAC PROCESSOR.
This is accomplished by writing “xxxx x1xx”
into the TxDS3 FEAC Configuration & Status Register
ENABLE THE TRANSMIT FEAC PROCESSOR.
This is accomplished by writing “xxxx x1xx”
into the TxDS3 FEAC Configuration & Status Register
INITIATE TRANSMISSION OF THE “OUTBOUND”
FEAC MESSAGE.
This is accomplished by writing “xxxx xx1x” into the
TxDS3 FEAC Configuration & Status Register.
INITIATE TRANSMISSION OF THE “OUTBOUND”
FEAC MESSAGE.
This is accomplished by writing “xxxx xx1x” into the
TxDS3 FEAC Configuration & Status Register.
TRANSMIT FEAC PROCESSOR ENCAPSULATES
THE “OUTBOUND” FEAC VALUE INTO A 16 BIT
FRAMING STRUCTURE.
TRANSMIT FEAC PROCESSOR ENCAPSULATES
THE “OUTBOUND” FEAC VALUE INTO A 16 BIT
FRAMING STRUCTURE.
TRANSMIT FEAC PROCESSOR PROCEEDS TO
INSERT THE 16-BIT MESSAGE (IN A BIT-BY-BIT
MANNER) INTO THE “FEAC” BIT-FIELDS OF
EACH OUTBOUND DS3 FRAME.
TRANSMIT FEAC PROCESSOR PROCEEDS TO
INSERT THE 16-BIT MESSAGE (IN A BIT-BY-BIT
MANNER) INTO THE “FEAC” BIT-FIELDS OF
EACH OUTBOUND DS3 FRAME.
Is
Transmission
of the 16 Bit FEAC
Message
Complete
?
Is
Transmission
of the 16 Bit FEAC
Message
Complete
?
Has
the 16-bit
FEAC Message been
transmitted to the
Remote Terminal
10 times
?
Has
the 16-bit
FEAC Message been
transmitted to the
Remote Terminal
10 times
?
GENERATE THE TRANSMIT FEAC
INTERRUPT
GENERATE THE TRANSMIT FEAC
INTERRUPT
INVOKE THE “TRANSMIT FEAC INTERRUPT
SERVICE ROUTINE.
INVOKE THE “TRANSMIT FEAC INTERRUPT
SERVICE ROUTINE.
1
NO
YES
NO
YES