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XRT79L71
PRELIMINARY
315
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
REV. P2.0.0
STEP 2 - Configure the "N" bit (within each outbound E3 Frame) to function as the LAPD Channel.
The user can accomplish this by setting Bits 4 and 3 (TxNSrcSel[1:0]) within the Transmit E3 Configuration
Register - G.751 to [1, 0], as depicted below.
This write operation will configure the Transmit LAPD Controller block to use the "N" bit as the LAPD Channel.
In this setting, the Transmit LAPD Controller block will fragment the contents of the outbound LAPD/PMDL
Message into bits and it will insert each of these bytes into the "N" bit-field position within each outbound E3
frame.
STEP 3 - Enable the Transmit LAPD Controller
This is accomplished by setting Bit 0 (Transmit LAPD Enable) within the Transmit E3 LAPD Configuration
register to "1", as illustrated below.
NOTE: Once the user executes the above-mentioned step, then the Transmit LAPD Controller will begin to transmit the Idle
(Flag) Sequence (e.g., a repeating string of 0x7E) via the "N" bit within each outbound E3 frame.
STEP 4 - Configure the Transmit LAPD Controller to transmit a non-standard size LAPD Message.
This is accomplished by setting Bit 7 (LAPD Any) within the Transmit E3 LAPD Configuration Register to "1",
as illustrated below.
Framer Operating Mode Register (Address = 0x1100)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Local
Loop back
DS3/E3*
Internal
LOS Enable
RESET
Direct
Mapped ATM
Frame
Format
Timing Reference Select
[1:0]
R/W
X
0
X
0
X
0
X
Transmit E3 Configuration Register - G.751 (Address = 0x1130)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
TxBIP-4
Enable
TxASrcSel[1:0]
TxNSrcSel[1:0]
TxAIS
Enable
TxLOS
Enable
TxFAS
Source Sel
R/W
0
1
0
Transmit E3 LAPD Configuration Register (Address = 0x1133)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
LAPD
Any
Unused
Auto
Retransmit
Unused
Transmit
LAPD
Message
Length
Transmit
LAPD
Enable
R/W
RO
R/O
R/W
R/O
R/W
0
X
1