Note (1): This bit should only be set if an I2C device which needs a 16-bit addr" />
參數(shù)資料
型號： BBT3821-JH
廠商： Intersil
文件頁數(shù)： 18/75頁
文件大小： 0K
描述： IC RE-TIMER OCTAL 192-BGA
標(biāo)準(zhǔn)包裝： 90
類型： 時(shí)鐘和數(shù)據(jù)恢復(fù)（CDR），多路復(fù)用器
PLL： 無
輸入： CML
輸出： CML，CMOS
電路數(shù)： 1
比率 - 輸入:輸出： 8:8
差分 - 輸入:輸出： 是/是
頻率 - 最大： 3.1875Gbps
電源電壓： 1.425 V ~ 2.5 V
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 192-EBGA
供應(yīng)商設(shè)備封裝： 192-EBGA-B（17x17）
包裝： 托盤
25
Note (1): This bit should only be set if an I2C device which needs a 16-bit address is to be addressed. The NVR and DOM spaces are all 8-bit address sections, and for
these areas, this bit should be 0’b.
Note (2): Block 256-byte NVR writes will not occur unless the WRTP pin is set Low. NVR Write Page Size controls Page size for Block operations only.
Note (3): This area corresponds to the XENPAK-defined Customer Area; see XENPAK Spec R3.0 Section 10.12.22. Writes will be performed one byte at a time.
Note (4): The I2C clock speeds listed are approximate. They are derived by division from the CMU, locked to the RFCP/N inputs. At 156.25MHz, the nominal 100kHz
clock will actually be 156.25/1.6kHz, just over 97.5kHz. See also the notes to Table 117.
Note (1): These bits are latched high on any internal error condition detected. They are reset low (cleared) on being read.
Note (2): These bits are set if the EXOR sum calculated from the indicated range is not the same as the value read into the listed checksum register. Note that this is
NOT the same as the XENPAK-defined checksum calculation. Contact Intersil for a method of reconciling these two checksum calculations.
Table 19. I2C ONE-BYTE OPERATION WRITE DATA REGISTER
MDIO Register Address = 1.32772 (1.8004’h)
BIT
NAME
SETTING
DEFAULT
R/W
DESCRIPTION
1.32772.15:8
Reserved
00’h
RO
1.32772.7:0
Write Data
I2C Write Data
00’h
R/W
Data to be written by 1-byte Write Operation
Table 20. NVR I2C OPERATION CONTROL REGISTER
MDIO REGISTER ADDRESS = 1.32773 (1.8005’h)
BIT
NAME
SETTING
DEFAULT
R/W
DESCRIPTION
1.32773.15:9
Reserved
00’h
RO
1.32773.8
Long Memory(1)
1 =16 bit
0 = 8 bit
0’b
R/W
Length of address for I2C device selected
1.32773.7
NVR Write Size
0’b
R/W
1 = Block write all 256 bytes to NVR(2)
0 = Write only 1.807F:AE’h to NVR(3)
1.32773.6:4
I2C Bus Speed
Speed of I2C SCL
clock(4) (derived
from REF_CLOCK)
100’b
R/W
111 = 400kHz
110 = 200kHz
101 = 150kHz
100 = 100kHz
011 = 40kHz
010 = 20kHz
001 = 10kHz
000 = 4kHz
1.32773.3:2
NVR ACK Error
Count
11 = 63
10 = 16
01 = 4
00 = 1
11’b
R/W
Number of ACK failures at any address before I2C
Operation failure is reported
1.32773.1:0
NVR Write Page
Size(2)
11 = 32 bytes
10 = 16 bytes
01 = 8 bytes
00 = 4 byte
01’b
R/W
The I2C interface block write operation will issue a
STOP and wait for the EEPROM every time after this
number of bytes are sent out
Table 21. NVR I2C OPERATION STATUS REGISTER
MDIO REGISTER ADDRESS = 1.32774 (1.8006’h)
BIT
NAME
SETTING
DEFAULT
R/W
DESCRIPTION
1.32774.15
XP_ENA
XP_ENA pin
RO
1 = XP_ENA pin high, 0 = low
1.32774.14:4
Reserved
0000’h
RO
1.32774.3
Vendor Specific
Area EXOR sum check
Error Flag
0’b
RO LH
1 = 1.8106 ! =
EXOR(1.80AE:8105)
0 = 1.8106 =
EXOR(1.80AE:8105) (2)
1.32774.2
Customer Write Area
EXOR sum check
Error Flag
0’b
RO LH
1 = 1.80AD ! =
EXOR(1.807E:80AC)
0 = 1.80AD =
EXOR(1.807E:80AC) (2)
1.32774.1
Reserved
0’b
RO
LH(1)
1.32774.0
NVR Area EXOR sum
check
Error Flag
0’b
RO LH
1 = 1.807D ! =
EXOR(1.8007:807C)
0 = 1.807D =
EXOR(1.8007:807C) (2)
BBT3821
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