FIGURE 2. DETAILED FUNCTIONAL BLOCK DIAGRAM (BIST OMITTED) (See also Figure 4 & Figure 5 for MDIO and LASI blocks and Figure 6 for BIST oper" />
參數(shù)資料
型號(hào): BBT3821-JH
廠商: Intersil
文件頁(yè)數(shù): 74/75頁(yè)
文件大?。?/td> 0K
描述: IC RE-TIMER OCTAL 192-BGA
標(biāo)準(zhǔn)包裝: 90
類型: 時(shí)鐘和數(shù)據(jù)恢復(fù)(CDR),多路復(fù)用器
PLL:
輸入: CML
輸出: CML,CMOS
電路數(shù): 1
比率 - 輸入:輸出: 8:8
差分 - 輸入:輸出: 是/是
頻率 - 最大: 3.1875Gbps
電源電壓: 1.425 V ~ 2.5 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 192-EBGA
供應(yīng)商設(shè)備封裝: 192-EBGA-B(17x17)
包裝: 托盤
8
FIGURE 2. DETAILED FUNCTIONAL BLOCK DIAGRAM (BIST OMITTED)
(See also Figure 4 & Figure 5 for MDIO and LASI blocks and Figure 6 for BIST operation)
Ingress
MDIO Register, LASI & Common Logic
JTAG
TDI
TDO
TMS
TCLK
TRSTN
20X or 10X
Clock
LX
4_
M
O
DE
RST
N
XP
_
E
NA
RFC
P/N
CDR
D
e
se
ri
ali
zer
&
Comma Det
ec
tor
10B/8B
Decoder
RX FIFO
Deskew
CDR
De
se
ri
al
iz
er
&
Comma De
te
ctor
10B/8B
Decoder
RX FIFO
Deskew
CDR
Equalizer
Signal
Detect
D
ese
riali
zer
&
Comma Det
ec
tor
10B/8B
Decoder
RX FIFO
Deskew
CDR
D
ese
rial
izer
&
Comma De
tect
or
10B/8B
Decoder
RX FIFO
Deskew
Se
ria
liz
e
r
8B/10B
Encoder,
AKR
Generator
TXFIFO &
Error and
Orderset
Detector
Se
ria
liz
e
r
8B/10B
Encoder,
AKR
Generator
TXFIFO &
Error and
Orderset
Detector
S
e
ria
liz
e
r
8B/10B
Encoder,
AKR
Generator
TXFIFO &
Error and
Orderset
Detector
S
e
ria
liz
e
r
8B/10B
Encoder,
AKR
Generator
TXFIFO &
Error and
Orderset
Detector
Equalizer
Signal
Detect
Equalizer
Signal
Detect
RXP0P/N
CDR
De
s
e
ria
liz
e
r&
C
o
mma
De
te
c
to
r
10B/8B
Decoder
RX FIFO
Deskew
CDR
D
e
s
e
ria
liz
e
r&
Co
m
a
Det
e
c
to
r
10B/8B
Decoder
RX FIFO
Deskew
CDR
D
e
s
e
rial
iz
er
&
Co
m
a
De
te
c
to
r
10B/8B
Decoder
RX FIFO
Deskew
CDR
D
e
s
e
rial
iz
er
&
C
o
mma
De
te
c
to
r
10B/8B
Decoder
RX FIFO
Deskew
S
e
ria
lize
r
8B/10B
Encoder,
AKR
Generator
TXFIFO &
Error and
Orderset
Detector
Se
ria
lize
r
8B/10B
Encoder,
AKR
Generator
TXFIFO &
Error and
Orderset
Detector
Se
rial
izer
8B/10B
Encoder,
AKR
Generator
TXFIFO &
Error and
Orderset
Detector
Se
ria
lizer
8B/10B
Encoder,
AKR
Generator
TXFIFO &
Error and
Orderset
Detector
RXP1P/N
RXP2P/N
RXP3P/N
Equalizer
Signal
Detect
TXP0 P/N
TXP1 P/N
TXP2 P/N
TXP3 P/N
Equalizer,
Signal
Detect
Equalizer,
Signal
Detect
Equalizer,
Signal
Detect
RCX0 P/N
RCX1 P/N
RCX2 P/N
RCX3 P/N
Equalizer
Signal
Detect
TCX0 P/N
TCX1 P/N
TCX2 P/N
TCX3 P/N
LX4/CX4
XAUI
TX
C
K
20
BIST
PMA
Loop
back
PCS // Network
Loopback
PCS //
(PHY XS)
Loopback
PHY XS
(Serial)
Loopback
Egress
Ingress
Egress
BIST_
E
NA
Device Address 3 PCS
Device Address 4 PHY XGXS
Device Address 1 PMA/PMD
GP
IO[
4:
0]
I2C
WRTP
SDC
SDA
MDIO
Engine
MDC
MDI
O
P
ADR[
4:
0]
T
X
_E
NA[
3:0
]
TX
_F
A
U
LT
LASI
OP
R
xxx
(5
pins
)
OP
T
xxx
(3
pins
)
TX
_ENC
MF[3
:0
]
BBT3821
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