Note (1): This bit is latched high on any change in the condition detected. It is reset low (cleared) on being read. Note (1): These bits contr" />
參數(shù)資料
型號(hào)： BBT3821-JH
廠商： Intersil
文件頁(yè)數(shù)： 22/75頁(yè)
文件大小： 0K
描述： IC RE-TIMER OCTAL 192-BGA
標(biāo)準(zhǔn)包裝： 90
類型： 時(shí)鐘和數(shù)據(jù)恢復(fù)（CDR），多路復(fù)用器
PLL： 無(wú)
輸入： CML
輸出： CML，CMOS
電路數(shù)： 1
比率 - 輸入:輸出： 8:8
差分 - 輸入:輸出： 是/是
頻率 - 最大： 3.1875Gbps
電源電壓： 1.425 V ~ 2.5 V
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 192-EBGA
供應(yīng)商設(shè)備封裝： 192-EBGA-B（17x17）
包裝： 托盤(pán)
29
Note (1): This bit is latched high on any change in the condition detected. It is reset low (cleared) on being read.
Note (1): These bits control (select) alarm signals (bits) in register 1.41072 (1.A070’h) to generate the TX_Flag bit of register 1.36868 (1.9004’h) to trigger TX_ALARM
and hence LASI.
Note (2): The default values may be overwritten by the Auto-Configure operation (See “Auto-Configuring Control Registers” on page 16 and Table 92 for details).
Note (1): These bits control (select) alarm signals (bits) in register 1.41073 (1.A071’h) to generate the RX_Flag bit of register 1.36867 (1.9003’h) to trigger RX_ALARM
and hence LASI.
Note (2): The default value may be overwritten by the Auto-Configure operation (See “Auto-Configuring Control Registers” on page 16 and Table 92 for details).
Table 29. XENPAK LASI STATUS REGISTER
MDIO REGISTER, ADDRESS = 1.36869 (1.9005’h)
BIT
NAME
SETTING
DEFAULT
R/W
DESCRIPTION
1.36869.15:4
Reserved
000’h
1.36869.3
GPIO Alarm
1 = Alarm Condition is
Detected
0 = No Alarm Condition is
Detected
0’b
RO
Logic OR of signals in register
1.49169.[15:8] (1.C011h), which come
from GPIO pins.
1.36869.2
RX_ALARM
0’b
RO
Logic OR of signals in register
1.36867 RX_ALARM Status register
1.36869.1
TX_ALARM
0’b
RO
Logic OR of signals in register
1.36868 TX_ALARM Status register
1.36869.0
LS_ALARM
0’b
RO
LH(1)
Link Status Logic change in AND of “PMD Signal
OK” (1.10.0), “PCS Lane
Alignment” (3.24.12), and “PHY XS
Lane Alignment” (4.24.12)
Table 30. XENPAK DOM TX_FLAG CONTROL REGISTER
MDIO REGISTER, ADDRESS = 1.36870 (1.9006’h)
BIT(1)
NAME
SETTING
DEFAULT(2)
R/W
DESCRIPTION
1.36870.15:8
Reserved
000’h
1.36870.7
TTmp_Hi
1 = Enable Alarm
0 = Disable Alarm
0’b
R/W
Transceiver Temp High Alarm Enable
1.36870.6
TTmp_Lo
0’b
R/W
Transceiver Temp Low Alarm Enable
1.36870.5:4
Reserved
0’h
R/W
1.36870.3
LBC_Hi
1 = Enable Alarm
0 = Disable Alarm
0’b
R/W
Laser Bias Current High AlarmEnable
1.36870.2
LBC_Lo
0’b
R/W
Laser Bias Current Low Alarm Enable
1.36870.1
LOP_Hi
0’b
R/W
Laser Output Power High Alarm Enable
1.36870.0
LOP_Lo
0’b
R/W
Laser Output Power Low Alarm Enable
Table 31. XENPAK DOM RX_FLAG CONTROL REGISTER
MDIO REGISTER, ADDRESS = 1.36871 (1.9007’h)
BIT(1)
NAME
SETTING
DEFAULT(2)
R/W
DESCRIPTION
1.36871.15:8
Reserved
000’h
1.36871.7
ROP_Hi
1 = Enable Alarm
0 = Disable Alarm
0’b
R/W
Receive Optical Power High Alarm
Enable
1.36871.6
ROP_Lo
0’b
R/W
Receive Optical Power Low Alarm
Enable
1.36871.5:0
Reserved
00’h
BBT3821
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