參數(shù)資料
型號： EP2C20F256I6N
廠商： ALTERA CORP
元件分類： FPGA
英文描述： FPGA, 1196 CLBS, PBGA256
封裝： LEAD FREE, FBGA-256
文件頁數(shù)： 161/168頁
文件大?。?/td> 2206K
代理商： EP2C20F256I6N
5–2
Altera Corporation
Cyclone II Device Handbook, Volume 1
February 2008
Operating Conditions
Table 5–2 specifies the recommended operating conditions for Cyclone II
devices. It shows the allowed voltage ranges for VCCINT, VCCIO, and the
operating junction temperature (TJ). The LVTTL and LVCMOS inputs are
powered by VCCIO only. The LVDS and LVPECL input buffers on
dedicated clock pins are powered by VCCINT. The SSTL, HSTL, LVDS
input buffers are powered by both VCCINT and VCCIO.
Table 5–2. Recommended Operating Conditions
Symbol
Parameter
Conditions
Minimum
Maximum
Unit
VCCINT
Supply voltage for internal
logic and input buffers
1.15
1.25
V
VCCIO (2)
Supply voltage for output
buffers, 3.3-V operation
3.135 (3.00)
3.465 (3.60)
V
Supply voltage for output
buffers, 2.5-V operation
2.375
2.625
V
Supply voltage for output
buffers, 1.8-V operation
1.71
1.89
V
Supply voltage for output
buffers, 1.5-V operation
1.425
1.575
V
TJ
Operating junction
temperature
For commercial use
0
85
°C
For industrial use
–40
100
°C
For extended
temperature use
–40
125
°C
For automotive use
–40
125
°C
Notes to Table 5–2:
(1)
The VCC must rise monotonically. The maximum VCC (both VCCIO and VCCINT) rise time is 100 ms for non-A devices
and 2 ms for A devices.
(2)
The VCCIO range given here spans the lowest and highest operating voltages of all supported I/O standards. The
recommended VCCIO range specific to each of the single-ended I/O standards is given in Table 5–6, and those
specific to the differential standards is given in Table 5–8.
(3)
The minimum and maximum values of 3.0 V and 3.6 V, respectively, for VCCIO only applies to the PCI and PCI-X
I/O standards. Refer to Table 5–6 for the voltage range of other I/O standards.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP2C20F256I8 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Cyclone II 1172 LABs 152 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2C20F256I8GA 制造商:Altera Corporation 功能描述:
EP2C20F256I8N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Cyclone II 1172 LABs 152 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2C20F484C6 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Cyclone II 1172 LABs 315 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2C20F484C6N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Cyclone II 1172 LABs 315 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
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