參數(shù)資料
型號(hào)： intel386 DX
廠商： Intel Corp.
英文描述： 32-Bit CHMOS Microprocessor With Integrated Memory Management(32位CHMOS 微處理器帶集成存儲(chǔ)管理)
中文描述： 32位CHMOS微處理器集成內(nèi)存管理（32位CHMOS微處理器帶集成存儲(chǔ)管理）
文件頁數(shù)： 116/139頁
文件大?。?/td> 1587K
代理商： INTEL386 DX
Intel386
TM
DX MICROPROCESSOR
6.2.3.5 ENCODING OF OPERATION DIRECTION
(d) FIELD
In many two-operand instructions the d field is pres-
ent to indicate which operand is considered the
source and which is the destination.
d
Direction of Operation
0
Register/Memory
k
- - Register
‘‘reg’’ Field Indicates Source Operand;
‘‘mod r/m’’ or ‘‘mod ss index base’’ Indicates
Destination Operand
1
Register
k
- - Register/Memory
‘‘reg’’ Field Indicates Destination Operand;
‘‘mod r/m’’ or ‘‘mod ss index base’’ Indicates
Source Operand
6.2.3.6 ENCODING OF SIGN-EXTEND (s) FIELD
The s field occurs primarily to instructions with im-
mediate data fields. The s field has an effect only if
the size of the immediate data is 8 bits and is being
placed in a 16-bit or 32-bit destination.
s
Effect on
Immediate Data8
Effect on
Immediate Data 16
l
32
None
0 None
1 Sign-Extend Data8 to Fill
16-Bit or 32-Bit Destination
None
6.2.3.7 ENCODING OF CONDITIONAL TEST
(tttn) FIELD
For the conditional instructions (conditional jumps
and set on condition), tttn is encoded with n indicat-
ing to use the condition (n
e
0) or its negation (n
e
1),
and ttt giving the condition to test.
Mnemonic
Condition
tttn
O
NO
B/NAE
NB/AE
E/Z
NE/NZ
BE/NA
NBE/A
S
NS
P/PE
NP/PO
L/NGE
NL/GE
LE/NG
NLE/G
Overflow
No Overflow
Below/Not Above or Equal
Not Below/Above or Equal
Equal/Zero
Not Equal/Not Zero
Below or Equal/Not Above
Not Below or Equal/Above
Sign
Not Sign
Parity/Parity Even
Not Parity/Parity Odd
Less Than/Not Greater or Equal
Not Less Than/Greater or Equal
Less Than or Equal/Greater Than 1110
Not Less or Equal/Greater Than
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1111
6.2.3.8 ENCODING OF CONTROL OR DEBUG
OR TEST REGISTER (eee) FIELD
For the loading and storing of the Control, Debug
and Test registers.
When Interpreted as Control Register Field
eee Code
Reg Name
000
010
011
CR0
CR2
CR3
Do not use any other encoding
When Interpreted as Debug Register Field
eee Code
Reg Name
000
001
010
011
110
111
DR0
DR1
DR2
DR3
DR6
DR7
Do not use any other encoding
When Interpreted as Test Register Field
eee Code
Reg Name
110
111
TR6
TR7
Do not use any other encoding
116
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