參數(shù)資料
型號(hào): MT29F4G08BABWP
元件分類: PROM
英文描述: 512M X 8 FLASH 2.7V PROM, 18 ns, PDSO48
封裝: LEAD FREE, TSOP1-48
文件頁(yè)數(shù): 36/57頁(yè)
文件大?。?/td> 1057K
代理商: MT29F4G08BABWP
PDF: 09005aef818a56a7 / Source: 09005aef81590bdd
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2gb_nand_m29b__2.fm - Rev. I 1/06 EN
41
2004 Micron Technology, Inc. All rights reserved.
2, 4, 8Gb: x8/x16 Multiplexed NAND Flash Memory
Electrical Characteristics
Notes: 1. For PROGRAM PAGE CACHE MODE operations, the x16 AC Characteristics apply for both
x16 and x8 devices.
2. Transition is measured ±200mV from steady-state voltage with load. This parameter is
sampled and not 100 percent tested.
3. The PRE function is not supported on extended-temperature devices.
4. If RESET (FFh) command is loaded at ready state, the device goes busy for maximum 5s.
5. Do not issue a new command during tWB, even if R/B# is ready.
Notes: 1. Eight total to the same page.
2. tCBSY MAX time depends on timing between internal program completion and data in.
3. tLPROG = tPROG (last page) + tPROG (last – 1 page) – cmd load time (last page) – addr load
time (last page) – data load time (last page).
Table 18:
AC Characteristics: Normal Operation
Parameter
Symbol
x16
x8
Unit
Notes
Min
Max
Min
Max
ALE to RE# delay
tAR
10
10
ns
CE# access time
tCEA
–45–23
ns
1
CE# HIGH to output High-Z
tCHZ
–20–20
ns
2
CLE access time
tCLEA
–45–28
ns
1
CLE to RE# delay
tCLR
10
10
ns
Cache busy in page read cache
mode (first 31h)
tDCBSYR1
–3–
3
s
Cache busy in page read cache
mode (next 31h and 3Fh)
tDCBSYR2
tDCBSYR1
25
tDCBSYR1
25
s
Ouput High-Z to RE# LOW
tIR
0–0–
ns
1
Data output hold time
tOH
15
15
ns
Data transfer from Flash array to
data register
tR
–25–25
s
READ cycle time
tRC
50
30
ns
1
RE# access time
tREA
–30–18
ns
1
RE# HIGH hold time
tREH
15
10
ns
1
RE# HIGH to output High-Z
tRHZ
–30–30
ns
2
RE# pulse width
tRP
25
15
ns
1
Data transfer from Flash array to
data register at power-up with
PRE enabled @ 3.3V Vcc
tRPRE
–25–25
s
3
Ready to RE# LOW
tRR
20
20
ns
Reset time
(READ/PROGRAM/ERASE)
tRST
5/10/500
5/10/500
s
4
WE# HIGH to busy
tWB
100
100
ns
4, 5
WE# HIGH to RE# LOW
tWHR
60
60
ns
Table 19:
PROGRAM/ERASE Characteristics
Parameter
Symbol
Typ
Max
Unit
Notes
Number of partial page programs
NOP
–8
Cycle
1
Block erase time
tBERS
23
ms
Busy time for cache program
tCBSY
3
700
s
2
Last page program time
tLPROG
––
3
Page program time
tPROG
300
700
s
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