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參數(shù)資料
| 型號： | MT29F4G08BABWP |
| 元件分類： | PROM |
| 英文描述： | 512M X 8 FLASH 2.7V PROM, 18 ns, PDSO48 |
| 封裝： | LEAD FREE, TSOP1-48 |
| 文件頁數(shù)： | 57/57頁 |
| 文件大?。?/td> | 1057K |
| 代理商： | MT29F4G08BABWP |
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PDF: 09005aef818a56a7 / Source: 09005aef81590bdd
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2gb_nand_m29b__2.fm - Rev. I 1/06 EN
9
2004 Micron Technology, Inc. All rights reserved.
2, 4, 8Gb: x8/x16 Multiplexed NAND Flash Memory
General Description
Notes: 1. The PRE function is not supported on extended-temperature devices.
Table 1:
Pin Descriptions
Symbol
Type
Description
ALE
Input
Address latch enable: During the time ALE is HIGH, address information is
transferred from I/O[7:0] into the on-chip address register upon a LOW-to-HIGH
transition on WE#
. When address information is not being loaded, the ALE pin
should be driven LOW.
CE#, CE2#
Input
Chip enable: Gates transfers between the host system and the NAND device. Once
the device starts a PROGRAM or ERASE operation, the chip enable pin can be de-
asserted. For the 8Gb configuration, CE# controls the first 4Gb of memory; CE2#
controls the second 4Gb. See the Bus Operation section, starting on “Bus
Operation” on page 16 for additional operational details.
CLE
Input
Command latch enable: When CLE is HIGH, information is transferred from
I/O[7:0] to the on-chip command register on the rising edge of WE#. When
command information is not being loaded, the CLE pin should be driven LOW.
PRE1
(3V device only)
Input
Power-on read enable: Enables the auto-read function when at Vcc. See “Bus
Operation” on page 16, for additional details.
RE#
Input
Read enable: Gates transfers from the NAND device to the host system.
WE#
Input
Write enable: Gates transfers from the host system to the NAND device.
WP#
Input
Write protect: Pin protects against inadvertent PROGRAM and ERASE operations.
All PROGRAM and ERASE operations are disabled when the WP# pin is LOW.
I/O[7:0]
MT29FxG08
I/O[15:0]
MT29FxG16
I/O
Data inputs/outputs: The bidirectional I/O pins transfer address, data, and
instruction information. Data is output only during READ operations; at other
times the I/O pins are inputs.
R/B#, R/B2#
Output
Ready/busy: An open-drain, active-LOW output, that uses an external pull-up
resistor. The pin is used to indicate when the chip is processing a PROGRAM or
ERASE operation. The pin is also used during a READ operation to indicate when
data is being transferred from the array into the serial data register. Once these
operations have completed, the R/B# returns to the High-Z state. In the 8Gb
configuration, R/B# is for the 4Gb of memory enabled by CE#; R/B2# is for the 4Gb
of memory enabled by CE2#.
VCC
Supply
VCC: The VCC pin is the power supply pin.
VSS
Supply
VSS: The VSS pin is the ground connection.
DNU
–
Do not use: Must be left floating.
NC
–
No connect: NC pins are not internally connected. These pins can be driven or left
unconnected.
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| MT29F4G08BABWP-ET | 功能描述:IC FLASH 4GBIT 48TSOP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 格式 - 存儲器:RAM 存儲器類型:SDRAM 存儲容量:256M（8Mx32） 速度:143MHz 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:托盤 其它名稱:Q2841869 |
| MT29F4G08BABWP-ET TR | 功能描述:IC FLASH 4GBIT 48TSOP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 格式 - 存儲器:RAM 存儲器類型:SDRAM 存儲容量:256M（8Mx32） 速度:143MHz 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:托盤 其它名稱:Q2841869 |
| MT29F4G08BBBWP | 功能描述:IC FLASH 4GBIT 48TSOP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 格式 - 存儲器:RAM 存儲器類型:SDRAM 存儲容量:256M（8Mx32） 速度:143MHz 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:托盤 其它名稱:Q2841869 |
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