參數(shù)資料
型號(hào)： PERICOMPI7C8150
廠商： Pericom Semiconductor Corp.
英文描述： 2-Port PCI-to-PCI Bridge
中文描述： 2端口PCI至PCI橋
文件頁數(shù)： 16/106頁
文件大?。?/td> 904K
代理商： PERICOMPI7C8150
PI7C8150
2-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
6
August 22, 2002 – Revision 1.02
MSK_IN
126
I
Secondary Clock Disable Serial Input:
This pin is used
by PI7C8150 to disable secondary clock outputs. The
serial stream is received by MSK_IN, starting when
P_RESET is detected deasserted and S_RESET_L is
detected as being asserted. The serial data is used for
selectively disabling secondary clock outputs and is
shifted into the secondary clock control configuration
register. This pin can be tied LOW to enable all
secondary clock outputs or tied HIGH to drive all the
secondary clock outputs HIGH.
Primary I/O Voltage:
This pin is used to determine
either 3.3V or 5V signaling on the primary bus. P_VIO
must be tied to 3.3V only when all devices on the
primary bus use 3.3V signaling. Otherwise, P_VIO is
tied to 5V.
Secondary I/O Voltage:
This pin is used to determine
either 3.3V or 5V signaling on the secondary bus.
S_VIO must be tied to 3.3V only when all devices on the
secondary bus use 3.3V signaling. Otherwise, S_VIO is
tied to 5V.
Bus/Power Clock Control Management Pin:
When
this pin is tied HIGH and the PI7C8150 is placed in the
D3
HOT
power state, it enables the PI7C8150 to place the
secondary bus in the B2 power state. The secondary
clocks are disabled and driven to 0. When this pin is tied
LOW, there is no effect on the secondary bus clocks
when the PI7C8150 enters the D3
HOT
power state.
66MHz Configuration:
This pin is used to designate
66MHz operation. Tie HIGH to enable 66MHz operation
or tie LOW to designate 33MHz operation.
Full-Scan Enable Control:
When SCAN_EN_H is
LOW, full-scan is in shift operation. When
SCAN_EN_H is HIGH, full-scan is in parallel operation.
Note: Valid only in test mode. Pin is CFG66 in normal
operation.
Mode Selection:
Reserved for future features.
P_VIO
124
I
S_VIO
135
I
BPCCE
44
I
CFG66
125
I
SCAN_EN_H
125
I
MS0, MS1
155, 106
I
MS0: 0, MS1: 0 – RESERVED
MS0: 0, MS1: 1 – RESERVED
MS0: 1, MS1: x – Intel compatible (default)
2.2.5
GENERAL PURPOSE I/O INTERFACE SIGNALS
Name
GPIO[3:0]
Pin #
24, 25, 27, 28
Type
TS
Description
General Purpose I/O Data Pins:
The 4 general-purpose
signals are programmable as either input-only or bi-
directional signals by writing the GPIO output enable
control register in the configuration space.
2.2.6
JTAG BOUNDARY SCAN SIGNALS
Name
TCK
Pin #
133
Type
I
Description
Test Clock.
Used to clock state information and data
into and out of the PI7C8150 during boundary scan.
Test Mode Select.
Used to control the state of the Test
Access Port controller.
Test Data Output.
When SCAN_EN_H is HIGH, it is
used (in conjunction with TCK) to shift data out of the
Test Access Port (TAP) in a serial bit stream.
TMS
132
I
TDO
130
O
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