- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄367908 > PERICOMPI7C8150 (Pericom Semiconductor Corp.) 2-Port PCI-to-PCI Bridge PDF資料下載
參數(shù)資料
| 型號： | PERICOMPI7C8150 |
| 廠商： | Pericom Semiconductor Corp. |
| 英文描述： | 2-Port PCI-to-PCI Bridge |
| 中文描述： | 2端口PCI至PCI橋 |
| 文件頁數(shù)： | 93/106頁 |
| 文件大?。?/td> | 904K |
| 代理商： | PERICOMPI7C8150 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁當前第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁
PI7C8150
2-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
83
August 22, 2002 – Revision 1.02
The target reports any type of data parity errors during write cycles, while the master
reports data parity errors during read cycles.
Detection of an address parity error will cause the PCI-to-PCI Bridge target to not claim
the bus (P_DEVSEL_L remains inactive) and the cycle will then terminate with a Master
Abort. When the bridge is acting as master, a data parity error during a read cycle results in
the bridge master initiating a Master Abort.
15.2.4
SECONDARY IDSEL MAPPING
When PI7C8150 detects a Type 1 configuration transaction for a device connected to
the secondary, it translates the Type 1 transaction to Type 0 transaction on the downstream
interface. Type 1 configuration format uses a 5-bit field at P_AD[15:11] as a device
number. This is translated to S_AD[31:16] by PI7C8150.
16
IEEE 1149.1 COMPATIBLE JTAG CONTROLLER
An IEEE 1149.1 compatible Test Access Port (TAP) controller and associated TAP pins
are provided to support boundary scan in PI7C8150 for board-level continuity test and
diagnostics. The TAP pins assigned are TCK, TDI, TDO, TMS and TRST_L. All digital
input, output, input/output pins are tested except TAP pins.
The IEEE 1149.1 Test Logic consists of a TAP controller, an instruction register, and
a group of test data registers including Bypass and Boundary Scan registers. The TAP
controller is a synchronous 16-state machine driven by the Test Clock (TCK) and the Test
Mode Select (TMS) pins. An independent power on reset circuit is provided to ensure the
machine is in TEST_LOGIC_RESET state at power-up. The JTAG signal lines are not
active when the PCI resource is operating PCI bus cycles.
PI7C8150 implements 3 basic instructions: BYPASS, SAMPLE/PRELOAD, and
EXTEST.
16.1
BOUNDARY SCAN ARCHITECTURE
Boundary-scan test logic consists of a boundary-scan register and support logic. These are
accessed through a Test Access Port (TAP). The TAP provides a simple serial interface
that allows all processor signal pins to be driven and/or sampled, thereby providing direct
control and monitoring of processor pins at the system level.
This mode of operation is valuable for design debugging and fault diagnosis since it
permits examination of connections not normally accessible to the test system. The
following subsections describe the boundary-scan test logic elements: TAP pins,
instruction register, test data registers and TAP controller. Figure 16-1 illustrates how these
pieces fit together to form the JTAG unit.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PESDXL2BT | Low capacitance double bidirectional ESD protection diodes in SOT23 |
| PESDXL2UM | LJT 23C 21#20 2#16 PIN RECP |
| PETAM1270BK300R | BRAID SLEEVING 300M |
| PETAM1270BK50C | 5V RS232 Transceiver with One Receiver Active in SHUTDOWN |
| PETAM1901BK200R | BRAID SLEEVING 300M |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PERINCSPRT5PKM | 制造商:Dialogic Corporation 功能描述:SERVICE;5PK;PERINCIDENT;HW;SUP |
| PER-M18 | 制造商:AAEON 制造商全稱:AAEON 功能描述:Desktop Stand For ONYX-150/ 153/ 154/ 172/ 192/ 1722/ 1922/ 2122/ 2215 (VESA 100) |
| PER-M20 | 制造商:AAEON 制造商全稱:AAEON 功能描述:Desktop Stand For ONYX-170/ 172/ 173/ 174/ 175/ 175S/175X/ 175V/ 190/ 192/ 193/ 195/ 195S/ 195X/195V/ 1722/ 1922/ 2122/ 2217/ 2219 (VESA 100/75) |
| PERMARK-FB-1/2-1.50-9 | 制造商:TE Connectivity 功能描述:PERMARK-FB-1/2-1.50-9 |
| PERMARK-FB-1/2-NO.21-9 | 制造商:TE Connectivity 功能描述:PERMARK-FB-1/2-NO.21-9 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。