參數(shù)資料
型號(hào)： PERICOMPI7C8150
廠商： Pericom Semiconductor Corp.
英文描述： 2-Port PCI-to-PCI Bridge
中文描述： 2端口PCI至PCI橋
文件頁數(shù)： 73/106頁
文件大小： 904K
代理商： PERICOMPI7C8150
PI7C8150
2-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
63
August 22, 2002 – Revision 1.02
Upstream (S to P) Memory Limit Upper 32-bit
Reserved
Reserved
GPIO Data and Control
58h
5Ch
60h
64h
P_SERR# Event
Disable
Reserved
P_SERR_L Status
Secondary Clock Control
68h
6Ch
70h
74h
78h
7Ch
80h
Reserved
Reserved
Reserved
Port Option
Retry Counter
Reserved
Secondary Master Timeout Counter
Primary Master Timeout Counter
Reserved
84h-AFh
B0h
B4h-D8h
DCh
E0h
E4h
E8h-FFh
Chassis Number
Slot Number
Next Pointer
Capability ID
Reserved
Power Management Capabilities
Reserved
Reserved
Next Item Pointer
Capability ID
PPB Support Extensions
Power Management Data
Next Pointer
Capability ID
Reserved
14.1.1
VENDOR ID REGISTER – OFFSET 00h
Bit
15:0
Function
Vendor ID
Type
R/O
Description
Identifies Pericom as vendor of this device. Hardwired as 12D8h.
14.1.2
DEVICE ID REGISTER – OFFSET 00h
Bit
31:16
Function
Device ID
Type
R/O
Description
Identifies this device as the PI7C8150. Hardwired as 8150h.
14.1.3
COMMAND REGISTER – OFFSET 04h
Bit
Function
Type
Description
Controls response to I/O access on the primary interface
0
I/O Space Enable
R/W
0: ignore I/O transactions on the primary interface
1: enable response to I/O transactions on the primary interface
Reset to 0
Controls response to memory accesses on the primary interface
1
Memory Space
Enable
R/W
0: ignore memory transactions on the primary interface
1: enable response to memory transactions on the primary interface
Reset to 0
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