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參數(shù)資料
| 型號： | QADCRM |
| 英文描述： | Queued Analog-to-Digital Converter Reference Manual |
| 中文描述： | 排隊模擬到數(shù)字轉(zhuǎn)換器參考手冊 |
| 文件頁數(shù)： | 79/122頁 |
| 文件大?。?/td> | 940K |
| 代理商： | QADCRM |
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QADC
REFERENCE MANUAL
DIGITAL CONTROL
MOTOROLA
7-33
The left justified, signed format corresponds to a half-scale, offset binary, two’s com-
plement data format. The data is routed onto the IMB according to the selected format.
The address used to access the table determines the data alignment format. All write
operations to the result word table are right justified.
The three result data formats are produced by routing the RAM bits onto the data bus.
The software chooses among the three formats by reading the result at the memory
address which produces the desired data alignment.
The result word table is read/write accessible by software. During normal operation,
applications software only needs to read the result table. Write operations to the table
may occur during test or debug breakpoint operation. When locations in the CCW table
are not used by an application, software could use the corresponding locations in the
result word table as scratch pad RAM, remembering that only 10 bits are implemented.
The result alignment is only implemented for software read operations. Since write op-
erations are not the normal use for the result registers, only one write data format is
supported, which is right justified data.
NOTE
Some write operations, like bit manipulation, may not operate as ex-
pected because the hardware cannot access a true 16-bit value.
NOTES:
1. S = Sign bit.
RJURR —
Right Justified, Unsigned Result Format
$####B0–$####FE
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
NOT USED
RESULT
LJSRR —
Left Justified, Signed Result Format
$####30–$####7E
15
S
1
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RESULT
NOT USED
LJURR —
Left Justified, Unsigned Result Register
$####B0–$####FE
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RESULT
NOT USED
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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