參數(shù)資料
型號： QADCRM
英文描述： Queued Analog-to-Digital Converter Reference Manual
中文描述： 排隊模擬到數(shù)字轉(zhuǎn)換器參考手冊
文件頁數(shù)： 91/122頁
文件大?。?/td> 940K
代理商： QADCRM
QADC
REFERENCE MANUAL
QUEUE PRIORITY EXAMPLES
MOTOROLA
9-5
The remaining situations, S6 through S11, show the impact of a queue 1 trigger event
occurring during queue 2 execution. Queue 1 is higher in priority, the conversion taking
place in queue 2 is aborted, so that there is not a variable latency time in responding
to queue 1 trigger events.
In situation 6 (
Figure 9-6
), the conversion initiated by the second CCW in queue 2 is
aborted just before the conversion is complete, so that queue 1 execution can begin.
Queue 2 is considered suspended. After queue 1 is finished, queue 2 starts over with
the first CCW, when the RES (resume) control bit is set to 0. Situation S7 (
Figure 9-
7
) shows that when pause operation is not in use with queue 2, queue 2 suspension
works the same way.
Figure 9-6 CCW Priority Situation 6
Figure 9-7 CCW Priority Situation 7
QADC S6
IDLE
Q1
Q2
QS
IDLE
IDLE
0000
1000
ACTIVE
C1
C2
T1
Q1:
C1
C3
C4
IDLE
Q2:
PF1
PAUSE
ACTIVE
CF1
T1
ACTIVE
SUSPEND
0100
ACTIVE
0110
1010
C1
C2
C3
C4
CF2
T2
0010
0000
QADC S7
T1
T1
PAUSE
Q1
Q2
QS
IDLE
ACTIVE
IDLE
IDLE
0010
0110
1010
0010
ACTIVE
0000
IDLE
Q1:
PF1
C1
C2
0000
1010
0101
ACTIVE
PAUSE
0110
C1
Q2:
T2
PF2
C1
C2
C3
C4
CF1
C3
C4
CF2
T2
C3
SUSPEND
ACTIVE
ACT
SUSPEND
ACTIVE
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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