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參數(shù)資料
| 型號： | QADCRM |
| 英文描述： | Queued Analog-to-Digital Converter Reference Manual |
| 中文描述： | 排隊模擬到數(shù)字轉換器參考手冊 |
| 文件頁數(shù)： | 88/122頁 |
| 文件大?。?/td> | 940K |
| 代理商： | QADCRM |
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MOTOROLA
9-2
QUEUE PRIORITY EXAMPLES
QADC
REFERENCE MANUAL
Below the queue execution flows are three sets of blocks that show the status infor-
mation that is made available to the software. The first two rows of status blocks show
the condition of each queue as:
Idle
Active
Pause
Suspended
Trigger Pending
The third row of status blocks shows the 4-bit QS status register field that encodes the
condition of the two queues. Two transition status cases, QS = 0011 and QS = 0111,
are not shown because they exist only very briefly between stable status conditions.
The first three examples in
Figure 9-1
,
Figure 9-2
, and
Figure 9-3
(S1, S2, and S3)
show what happens when a new trigger event is recognized before the queue has
completed servicing the previous trigger event on the same queue.
In situation S1 (
Figure 9-1
), one trigger event is being recognized on each queue while
that queue is still working on the previously recognized trigger event. The trigger over-
run error status bit is set, and otherwise, the premature trigger event is ignored. A trig-
ger event which occurs before the servicing of the previous trigger event is through,
does not disturb the queue execution in progress.
Figure 9-1 CCW Priority Situation 1
Table 9-2 Status Bits
Bit
Function
CF Flag
PF Flag
Set when the end of the queue is reached
Set when a queue completes execution up through a
pause bit
Set when a new trigger event occurs before the queue is
finished serving the previous trigger event
Trigger Overrun
Error (TOR)
Q1
Q2
QS
IDLE
IDLE
ACTIVE
IDLE
0000
1000
0000
0010
0000
TOR1
T1
T1
Q1:
C1
C2
C3
C4
CF1
C1
C2
C3
C4
TOR2
T2
T2
Q2:
CF2
IDLE
QADC S1
ACTIVE
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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