參數(shù)資料
型號： T8102A
英文描述： H.100/H.110 Interface and Time-Slot Interchangers
中文描述： H.100/H.110接口和時隙Interchangers
文件頁數(shù)： 20/112頁
文件大?。?/td> 1408K
代理商： T8102A
16
Lucent Technologies Inc.
Advance Data Sheet
November 1999
H.100/H.110 Interfaces and Time-Slot Interchangers
Ambassador T8100A, T8102, and T8105
2 Architecture and Functional Description
(continued)
2.1 Register/Memory Maps
(continued)
2.1.3 Address Mode Register
The AMR is defined in Table 10 below where (aaaa) is the stream address and the LAR is the time-slot address of
the selected memory space.
Note:
All unused AMR values are reserved.
Table 10. Address Mode Register
Bits
7—4
0000
0001
0010
0100
0101
0111
1001
1001
1010
1010
1011
1011
1011
1011
1110
1110
1110
1110
1110
1110
1110
1100
1110
1100
1110
1100
1110
1100
1110
1100
1110
1100
1111
1111
1111
1111
1111
1111
1111
1111
Bits
3—0
0000
(aaaa) Local Bus, Data Memory 1.
(aaaa) Local Bus, Data Memory 2.
(aaaa) Local Bus, Connection Memory, Time-Slot Field.
(aaaa) Local Bus, Connection Memory, Stream, and Control Bit Field.
0000
Local Bus, Holding Registers, Reset.
0000
0001
CAM, Data Memory 1.
Upper
256 Addresses (T8102, T8105 only).
0000
0001
CAM, Data Memory 2.
Upper
256 Addresses (T8102, T8105 only).
0000 CAM, Connection, Time-Slot Field.
0001
CAM, Connection, Stream, and Control Bit Field.
0010
CAM, Connection, Tag Field.
0011
CAM, Connection, Subrate Control, Tag Field MSB.
0000
CAM, Even, Make Connection (MKCE). Write to Next Free Location.
0001
CAM, Odd, Make Connection (MKCO). Write to Next Free Location.
0011
CAM, Local, Make Connection (MKCL). Write to Next Free Location.
0100
CAM, Even, Break Connection (BKCE).
0101
CAM, Odd, Break Connection (BKCO).
0111
CAM, Local, Break Connection (BKCL).
1000
1000
CAM, Even, Clear Location (CLLE).
Upper
256 Range. Requires LAR (T8102, T8105 only).
1001
1001
CAM, Odd, Clear Location (CLLO).
Upper
256 Range. Requires LAR (T8102, T8105 only).
1011
1011
CAM, Local, Clear Location (CLLL).
Upper
256 Range. Requires LAR (T8102, T8105 only).
1100
1100
CAM, Even, Read Location (RDCE).
Upper
256 Range. Requires LAR, IDR Holds Results (T8102, T8105 only).
1101
1101
CAM, Odd, Read Location (RDCO).
Upper
256 Range. Requires LAR, IDR Holds Results (T8102, T8105 only).
1111
1111
CAM, Local, Read Location (RDCL).
Upper
256 Range. Requires LAR, IDR Holds Results (T8102, T8105 only).
0000
CAM, Even, Find Entry (FENE). IDR Holds Results.
0001
CAM, Odd, Find Entry (FENO). IDR Holds Results.
0011
CAM, Local, Find Entry (FENL). IDR Holds Results.
1000
CAM, Even, Reset (RSCE).
1001
CAM, Odd, Reset (RSCO).
1011
CAM, Local, Reset (RSCL).
1100
CAM, Holding Registers, Reset (RCH).
1111
CAM, Initialize (CI). Reset All CAM Locations and Holding Registers.
Register Function
Control Registers.
CAM, Data Memory 1.
Lower
256 Addresses.
CAM, Data Memory 2.
Lower
256 Addresses.
CAM, Even, Clear Location (CLLE).
Lower
256 Range. Requires LAR.
CAM, Odd, Clear Location (CLLO).
Lower
256 Range. Requires LAR.
CAM, Local, Clear Location (CLLL).
Lower
256 Range. Requires LAR.
CAM, Even, Read Location (RDCE).
Lower
256 Range. Requires LAR, IDR Holds Results.
CAM, Odd, Read Location (RDCO).
Lower
256 Range. Requires LAR, IDR Holds Results.
CAM, Local, Read Location (RDCL).
Lower
256 Range. Requires LAR, IDR Holds Results.
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