參數(shù)資料
型號(hào): T8102A
英文描述: H.100/H.110 Interface and Time-Slot Interchangers
中文描述: H.100/H.110接口和時(shí)隙Interchangers
文件頁(yè)數(shù): 86/112頁(yè)
文件大?。?/td> 1408K
代理商: T8102A
82
Lucent Technologies Inc.
Advance Data Sheet
November 1999
H.100/H.110 Interfaces and Time-Slot Interchangers
Ambassador T8100A, T8102, and T8105
4 Electrical Characteristics
4.1 Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are abso-
lute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess
of those given in the operational sections of this data sheet. Exposure to absolute maximum ratings for extended
periods can adversely affect device reliability.
4.2 Handling Precautions
Although protection circuitry has been designed into this device, proper precautions should be taken to avoid expo-
sure to electrostatic discharge (ESD) during handling and mounting. Lucent employs a human-body model (HBM)
and a charged-device model (CDM) for ESD-susceptibility testing and protection design evaluation. ESD voltage
thresholds are dependent on the circuit parameters used to define the model. No industry-wide standard has been
adopted for CDM. However, a standard HBM (resistance = 1500
, capacitance = 100 pF) is widely used and,
therefore, can be used for comparison purposes:
Description
Symbol
V
DD
Min
V
SS
Max
3.6
V
DD
Unit
V
V
V
Supply Voltage
XTALIN and XTALOUT Pins
Voltage Applied to I/O Pins
Operating Temperature:
208-pin SQFP
217-ball BGA
Storage Temperature
V
SS
– 0.5
V
DD
+ 3.4
T
stg
0
40
–55
70
85
125
°C
°C
°C
HBM ESD Threshold Voltage
Device
T8100A, T8102, T8105
Rating
2500 V
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